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전자부품 데이터시트 검색엔진 |
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AM41DL3208G 데이터시트(HTML) 34 Page - SPANSION |
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AM41DL3208G 데이터시트(HTML) 34 Page - SPANSION |
34 / 65 page ![]() February 13, 2002 Am41DL3208G 33 P R E L IMINARY Table 16. Command Definitions (Flash Byte Mode) Legend: X = Don’t care RA = Address of the memory location to be read. RD = Data read from location RA during read operation. PA = Address of the memory location to be programmed. Addresses latch on the falling edge of the WE# or CE#f pulse, whichever happens later. PD = Data to be programmed at location PA. Data latches on the rising edge of WE# or CE#f pulse, whichever happens first. SADD = Address of the sector to be verified (in autoselect mode) or erased. Address bits A20–A12 uniquely select any sector. BA = Address of the bank that is being switched to autoselect mode, is in bypass mode, or is being erased. Notes: 1. See Table 1 for description of bus operations. 2. All values are in hexadecimal. 3. Except for the read cycle and the fourth cycle of the autoselect command sequence, all bus cycles are write cycles. 4. Data bits DQ15–DQ8 are don’t care in command sequences, except for RD and PD. 5. Unless otherwise noted, address bits A20–A12 are don’t cares. 6. No unlock or command cycles required when bank is in read mode. 7. The Reset command is required to return to reading array data (or to the erase-suspend-read mode if previously in Erase Suspend) when a bank is in the autoselect mode, or if DQ5 goes high (while the bank is providing status information). 8. The fourth cycle of the autoselect command sequence is a read cycle. The system must provide the bank address to obtain the manufacturer ID, device ID, or SecSi Sector factory protect information. Data bits DQ15–DQ8 are don’t care. See the Autoselect Command Sequence section for more information. 9. The device ID must be read across three cycles. The device ID is 00h for top boot and 01h for bottom boot. 10. The data is 80h for factory locked and 00h for not factory locked. 11. The data is 00h for an unprotected sector/sector block and 01h for a protected sector/sector block. 12. The Unlock Bypass command is required prior to the Unlock Bypass Program command. 13. The Unlock Bypass Reset command is required to return to reading array data when the bank is in the unlock bypass mode. 14. The system may read and program in non-erasing sectors, or enter the autoselect mode, when in the Erase Suspend mode. The Erase Suspend command is valid only during a sector erase operation, and requires the bank address. 15. The Erase Resume command is valid only during the Erase Suspend mode, and requires the bank address. 16. Command is valid when device is ready to read array data or when device is in autoselect mode. Command Sequence (Note 1) Bus Cycles (Notes 2–5) First Second Third Fourth Fifth Sixth Addr Data Addr Data Addr Data Addr Data Addr Data Addr Data Read (Note 6) 1 RA RD Reset (Note 7) 1 XXX F0 Manufacturer ID 4 AAA AA 555 55 (BA) AAA 90 (BA) 00 01 Device ID (Note 9) 6 AAA AA 555 55 (BA) AAA 90 (BA) 02 7E (BA) 1C 0A (BA) 1E 00/01 SecSi Sector Factory Protect (Note 10) 4 AAA AA 555 55 (BA) AAA 90 (BA) X06 82/02 Sector Protect Verify (Note 11) 4 AAA AA 555 55 (BA) AAA 90 (SADD) X04 00 01 Enter SecSi Sector Region 3 AAA AA 555 55 AAA 88 Exit SecSi Sector Region 4 AAA AA 555 55 AAA 90 XXX 00 Program 4 AAA AA 555 55 AAA A0 PA PD Unlock Bypass 3 AAA AA 555 55 AAA 20 Unlock Bypass Program (Note 12) 2 XXX A0 PA PD Unlock Bypass Reset (Note 13) 2 XXX 90 XXX 00 Chip Erase 6 AAA AA 555 55 AAA 80 AAA AA 555 55 AAA 10 Sector Erase 6 AAA AA 555 55 AAA 80 AAA AA 555 55 SADD 30 Erase Suspend (Note 14) 1 BA B0 Erase Resume (Note 15) 1 BA 30 CFI Query (Note 16) 1 55 98 |