AM41DL6408G datasheet(5/63 Pages) SPANSION | Stacked Multi-Chip Package (MCP) Flash Memory and SRAM

부품명	AM41DL6408G

부품 상세설명	Stacked Multi-Chip Package (MCP) Flash Memory and SRAM

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5 / 63 page

Am41DL6408G

August 19, 2002

P R E L I M INARY

SRAM Write Cycle .................................................................. 56

Figure 30. SRAM Write Cycle—WE# Control ................................. 56

Figure 31. SRAM Write Cycle—CE1#s Control .............................. 57

Figure 32. SRAM Write Cycle—UB#s and LB#s Control ................ 58

Flash Erase And Programming Performance . . . 59

Latchup Characteristics . . . . . . . . . . . . . . . . . . . 59

Package Pin Capacitance . . . . . . . . . . . . . . . . . . 59

Data Retention . . . . . . . . . . . . . . . . . . . . . . . . . . . 59

SRAM Data Retention . . . . . . . . . . . . . . . . . . . . . 60

Figure 33. CE1#s Controlled Data Retention Mode....................... 60

Figure 34. CE2s Controlled Data Retention Mode......................... 60

Physical Dimensions . . . . . . . . . . . . . . . . . . . . . . 61

FLB073—73-Ball Fine-Pitch Grid Array 8 x 11.6 mm ............. 61

Revision Summary . . . . . . . . . . . . . . . . . . . . . . . . 62

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