전자부품 데이터시트 검색엔진 |
|
ISL28025FR12Z-T 데이터시트(PDF) 11 Page - Renesas Technology Corp |
|
ISL28025FR12Z-T 데이터시트(HTML) 11 Page - Renesas Technology Corp |
11 / 53 page ISL28025 FN8388 Rev.6.00 Page 11 of 53 Feb 27, 2018 Pulse Width Suppression Time at SMBDAT and SMBCLK Inputs tIN Any pulse narrower than the maximum specification is suppressed 50 ns SMBCLK Falling Edge to SMBDAT Output Data Valid tAA SMBCLK falling edge crossing 30% of I2CVCC, until SMBDAT exits the 30% to 70% of I2CVCC window 900 ns Time the Bus Must be Free Before the Start of a New Transmission tBUF SMBDAT crossing 70% of I2CVCC during a STOP condition, to SMBDAT crossing 70% of I2CVCC during the following START condition 1300 ns Clock Low Time tLOW Measured at the 30% of I2CVCC crossing 1300 ns Clock High Time tHIGH Measured at the 70% of I2CVCC crossing 600 ns START Condition Set-Up Time tSU:STA SMBCLK rising edge to SMBDAT falling edge. Both crossing 70% of I2CVCC 600 ns START Condition Hold Time tHD:STA From SMBDAT falling edge crossing 30% of I2CVCC to SMBCLK falling edge crossing 70% of I2CVCC 600 ns Input Data Set-Up Time tSU:DAT From SMBDAT exiting the 30% to 70% of VCC window, to SMBCLK rising edge crossing 30% of I2CVCC 100 ns Input Data Hold Time tHD:DAT From SMBCLK falling edge crossing 30% of I2CVCC to SMBDAT entering the 30% to 70% of I2CVCC window 20 900 ns STOP Condition Set-Up Time tSU:STO From SMBCLK rising edge crossing 70% of I2CVCC, to SMBDAT rising edge crossing 30% of I2CVCC 600 ns STOP Condition Hold Time tHD:STO From SMBDAT rising edge to SMBCLK falling edge. Both crossing 70% of I2CVCC 600 ns Output Data Hold Time tDH From SMBCLK falling edge crossing 30% of I2CVCC, until SMBDAT enters the 30% to 70% of I2CVCC window 0ns SMBDAT and SMBCLK Rise Time tR From 30% to 70% of I2CVCC 20 + 0.1 x Cb 300 ns SMBDAT and SMBCLK Fall Time tF From 70% to 30% of I2CVCC 20 + 0.1 x Cb 300 ns Capacitive Loading of SMBDAT or SMBCLK Cb Total on-chip and off-chip 10 400 pF SMBDAT and SMBCLK Bus Pull-Up Resistor Off-Chip RPU Maximum is determined by tR and tF For Cb = 400pF, max is about 2kΩ ~2.5kΩ. For Cb = 40pF, max is about 15kΩ ~ 20kΩ 1kΩ POWER SUPPLY Power Supply Voltage at VCC Vvcc 3.0 3.3 5.5 V Power Supply Voltage at I2CVCC Vi2cvcc f = DC to 400kHz 1.2 3.3 5.5 V Only ADC in Conversion mode All other blocks are disabled 690 830 µA Electrical Specifications TA = +25°C, I2CVCC = VCC = 3.3V, VINP = VBUS = 12V, VSENSE = VINP - VINM = 80mV, Aux V = 3V, Conversion Time: Aux = Primary = 2.05ms, Internal AVG Aux = Primary = 128, unless otherwise specified. All voltages with respect to GND pin. Temperature limits established by characterization. (Continued) PARAMETER SYMBOL TEST CONDITIONS MIN (Note 7)TYP MAX (Note 7)UNIT |
유사한 부품 번호 - ISL28025FR12Z-T |
|
유사한 설명 - ISL28025FR12Z-T |
|
|
링크 URL |
개인정보취급방침 |
ALLDATASHEET.CO.KR |
ALLDATASHEET 가 귀하에 도움이 되셨나요? [ DONATE ] |
Alldatasheet는? | 광고문의 | 운영자에게 연락하기 | 개인정보취급방침 | 링크교환 | 제조사별 검색 All Rights Reserved©Alldatasheet.com |
Russian : Alldatasheetru.com | Korean : Alldatasheet.co.kr | Spanish : Alldatasheet.es | French : Alldatasheet.fr | Italian : Alldatasheetit.com Portuguese : Alldatasheetpt.com | Polish : Alldatasheet.pl | Vietnamese : Alldatasheet.vn Indian : Alldatasheet.in | Mexican : Alldatasheet.com.mx | British : Alldatasheet.co.uk | New Zealand : Alldatasheet.co.nz |
Family Site : ic2ic.com |
icmetro.com |