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DM54LS377E 데이터시트(PDF) 1 Page - National Semiconductor (TI) |
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DM54LS377E 데이터시트(HTML) 1 Page - National Semiconductor (TI) |
1 / 6 page TLF9831 May 1992 DM54LS377DM74LS377 Octal D Flip-Flop with Common Enable and Clock General Description The ’LS377 is an 8-bit register built using advanced low power Schottky technology This register consists of eight D-type flip-flops with a buffered common clock and a buff- ered common input enable The device is packaged in the space-saving (03 inch row spacing) 20-pin package Features Y 8-bit high speed parallel registers Y Positive edge-triggered D-type flip-flops Y Fully buffered common clock and enable inputs Connection Diagram Dual-In-Line Package TLF9831 – 1 Order Number DM54LS377E DM54LS377J DM54LS377W DM74LS377WM or DM74LS377N See NS Package Number E20A J20A M20B N20A or W20A Pin Names Description E Enable Input (Active LOW) D0 – D7 Data Inputs CP Clock Pulse Input (Active Rising Edge) Q0 – Q7 Flip-Flop Outputs C1995 National Semiconductor Corporation RRD-B30M115Printed in U S A |
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