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74LCX07MTC ๋ฐ์ดํ„ฐ์‹œํŠธ(HTML) 11 Page - ON Semiconductor

๋ถ€ํ’ˆ๋ช… 74LCX07MTC
์ƒ์„ธ๋‚ด์šฉ  Low Voltage Hex Buffer with Open Drain Outputs
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74LCX07MTC ๋ฐ์ดํ„ฐ์‹œํŠธ(HTML) 11 Page - ON Semiconductor

 
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background image
1.70
5.60
1.27
0.65
1.50
1.25
1.75 MAX
0.25
0.10
C
4.00
3.80
8.75
8.50
6.00
(0.33)
0.51
0.35
7.62
1.27
1
PIN #1
IDENT.
A
B
0.25
0.19
A
0.50
0.25 x 45
R0.10
R0.10
(1.04)
0.36
8ยฐ
0ยฐ
0.90
0.50
DETAIL A
SCALE 16 : 1
GAGE
PLANE
SEATING PLANE
TOP VIEW
FRONT VIEW
SIDE VIEW
14
7
8
1
7
8
LAND PATTERN RECOMMENDATION
NOTES:
A. CONFORMS TO JEDEC MS-012,
VARIATION AB, ISSUE C
B. ALL DIMENSIONS ARE IN MILLIMETERS
C. DIMENSIONS DO NOT INCLUDE MOLD
FLASH OR BURRS
D. LAND PATTERN STANDARD:
SOIC127P600X145-14M
E. CONFORMS TO ASME Y14.5M, 2009
D. DRAWING FILENAME: MKT-M14Arev14
14
0.10 C
0.25 M C B A


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