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8XC51R 데이터시트(PDF) 4 Page - Intel Corporation |
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8XC51R 데이터시트(HTML) 4 Page - Intel Corporation |
4 / 20 page 8XC51RARBRC PIN DESCRIPTIONS VCC Supply voltage VSS Circuit ground VSS1 Secondary ground (not on DIP) Provided to reduce ground bounce and improve power supply by-passing NOTE This pin is not a substitute for the VSS pin (pin 22) (Connection not necessary for proper operation) Port 0 Port 0 is an 8-bit open drain bidirectional IO port As an output port each pin can sink several LS TTL inputs Port 0 pins that have 1’s written to them float and in that state can be used as high-im- pedance inputs Port 0 is also the multiplexed low-order address and data bus during accesses to external Program and Data Memory In this application it uses strong inter- nal pullups when emitting 1’s and can source and sink several LS TTL inputs Port 0 also receives the code bytes during EPROM programming and outputs the code bytes during program verification External pullup resistors are re- quired during program verification Port 1 Port 1 is an 8-bit bidirectional IO port with internal pullups The Port 1 output buffers can drive LS TTL inputs Port 1 pins that have 1’s written to them are pulled high by the internal pullups and in that state can be used as inputs As inputs Port 1 pins that are externally pulled low will source current (IIL on the data sheet) because of the internal pull- ups In addition Port 1 serves the functions of the follow- ing special features of the 8XC51RX Port Pin Alternate Function P10 T2 (External Count Input to Timer Counter 2) Clock-Out P11 T2EX (TimerCounter 2 Capture Reload Trigger and Direction Control) Port 1 receives the low-order address bytes during EPROM programming and verifying Port 2 Port 2 is an 8-bit bidirectional IO port with internal pullups The Port 2 output buffers can drive LS TTL inputs Port 2 pins that have 1’s written to them are pulled high by the internal pullups and in that state can be used as inputs As inputs Port 2 pins that are externally pulled low will source current (IIL on the data sheet) because of the internal pull- ups Port 2 emits the high-order address byte during fetches from external Program Memory and during accesses to external Data Memory that use 16-bit addresses (MOVX DPTR) In this application it uses strong internal pullups when emitting 1’s Dur- ing accesses to external Data Memory that use 8-bit addresses (MOVX Ri) Port 2 emits the contents of the P2 Special Function Register Some Port 2 pins receive the high-order address bits during EPROM programming and program verifica- tion Port 3 Port 3 is an 8-bit bidirectional IO port with internal pullups The Port 3 output buffers can drive LS TTL inputs Port 3 pins that have 1’s written to them are pulled high by the internal pullups and in that state can be used as inputs As inputs Port 3 pins that are externally pulled low will source current (IIL on the data sheet) because of the pullups Port 3 also serves the functions of various special features of the 8051 Family as listed below Port Pin Alternate Function P30 RXD (serial input port) P31 TXD (serial output port) P32 INT0 (external interrupt 0) P33 INT1 (external interrupt 1) P34 T0 (Timer 0 external input) P35 T1 (Timer 1 external input) P36 WR (external data memory write strobe) P37 RD (external data memory read strobe) RST Reset IO A high on this pin for two machine cycles while the oscillator is running resets the de- vice The port pins will be driven to their reset condi- tion when a minimum VIHI voltage is applied whether the oscillator is running or not An internal pulldown resistor permits a power-on reset with only a capaci- tor connected to VCC After a WatchDog Timer over- flow this RST pin will drive an output high pulse at a minimum VOH2 for 96 x TOSC duration while the in- ternal reset signal is active ALE Address Latch Enable output pulse for latching the low byte of the address during accesses to ex- 4 |
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