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MB84VD23381FJ 데이터시트(HTML) 49 Page - Fujitsu Component Limited.

부품명 MB84VD23381FJ
상세내용  Stacked MCP (Multi-Chip Package) FLASH MEMORY & FCRAM
Download  54 Pages
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제조사  FUJITSU [Fujitsu Component Limited.]
홈페이지  http://edevice.fujitsu.com/fmd/en/index.html
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MB84VD23381FJ 데이터시트(HTML) 49 Page - Fujitsu Component Limited.

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MB84VD23381FJ-80
48
s
s
s
s DATA RETENTION CHARACTERISTICS (FCRAM)
*: 2.0 V
≤ VIH ≤ VCCr + 0.3 V
• Data Retention Timing (FCRAM)
Parameter
Symbol
Conditions
Value
Unit
Min
Max
VCCr Data Retention Supply Voltage
VDR
CE1r
= CE2r ≥ VCCr − 0.2 V or,
CE1r
= CE2r = VIH,
2.1
3.1
V
VCCr Data Retention Supply Current
IDR
2.3 V
≤ VCCr ≤ 2.7 V,
VIN
= VIH*or VIL,
CE1r
= CE2r = VIH*, IOUT = 0 mA
1mA
IDR1
2.3 V
≤ VCCr ≤ 2.7 V,
VIN
≤ 0.2 V or VIN ≥ VCCr − 0.2 V,
CE1r
= CE2r ≥ VCCr − 0.2 V,
IOUT
= 0 mA
70
µA
Data Retention Setup Time
tDRS
2.7 V
≤ VCCr ≤ 3.1 V
at data retention entry
0
ns
Data Retention Recovery Time
tDRR
2.7 V
≤ VCCr ≤ 3.1 V
after data retention
90
ns
VCCr Voltage Transition Time
∆V/∆t0.5
V/
µs
∆V/∆t
CE1r
tDRR
Data Retention Mode
tDRS
VCCr
2.7 V
3.1 V
0.4 V
2.1 V
VSS
∆V/∆t
CE2r
Data bus must be in High-Z at data retention entry.
CE1r= CE2r > VCCr-0.2 V or
VIH* Min
*: 2.0 V
≤ VIH ≤ VCCr + 0.3 V


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