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MB84VD23381FJ 데이터시트(HTML) 3 Page - Fujitsu Component Limited.

부품명 MB84VD23381FJ
상세내용  Stacked MCP (Multi-Chip Package) FLASH MEMORY & FCRAM
Download  54 Pages
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제조사  FUJITSU [Fujitsu Component Limited.]
홈페이지  http://edevice.fujitsu.com/fmd/en/index.html
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MB84VD23381FJ 데이터시트(HTML) 3 Page - Fujitsu Component Limited.

 
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MB84VD23381FJ-80
2
(Continued)
1.
FLASH MEMORY
• 0.17
µµµµm Process Technology
• Simultaneous Read/Write Operations (Dual Bank)
• FlexBankTM*1
Bank A : 8 Mbit (8 KB
× 8 and 64 KB × 15)
Bank B : 24 Mbit (64 KB
× 48)
Bank C : 24 Mbit (64 KB
× 48)
Bank D : 8 Mbit (8 KB
× 8 and 64 KB × 15)
Two virtual Banks are chosen from the combination of four physical banks
Host system can program or erase in one bank, and then read immediately and simultaneously from the other
bank with zero latency between read and write operations.
Read-while-erase
Read-while-program
• Single 3.0 V Read, Program, and Erase
Minimized system level power requirements
• Minimum 100,000 Program/Erase Cycles
• Sector Erase Architecture
Sixteen 4 Kword and one hundred twenty-six 32 Kword sectors in word.
Any combination of sectors can be concurrently erased. It also supports full chip erase.
• HiddenROM Region
256 byte of HiddenROM, accessible through a new “HiddenROM Enable” command sequence
Factory serialized and protected to provide a secure electronic serial number (ESN)
• WP/ACC Input Pin
At VIL, allows protection of “outermost” 2
× 8 Kbytes on both ends of boot sectors, regardless of sector protection/
unprotection status
At VIH, allows removal of boot sector protection
At VACC, increases program performance
• Embedded EraseTM*2 Algorithms
Automatically preprograms and erases the chip or any sector
• Embedded ProgramTM*2 Algorithms
Automatically writes and verifies data at specified address
• Data Polling and Toggle Bit Feature for Detection of Program or Erase Cycle Completion
• Ready/Busy Output (RY/BY)
Hardware method for detection of program or erase cycle completion
• Automatic Sleep Mode
When addresses remain stable, the device automatically switches itself to low power mode.
• Low VCCf Write Inhibit
≤ 2.5 V
• Program Suspend/Resume
Suspends the program operation to allow a read in another byte
• Erase Suspend/Resume
Suspends the erase operation to allow a read data and/or program in another sector within the same device
• Please Refer to “MBM29DL64DF” Datasheet in Detailed Function
(Continued)


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