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S71PL129JC0 ๋ฐ์ดํ„ฐ์‹œํŠธ(HTML) 65 Page - SPANSION

๋ถ€ํ’ˆ๋ช… S71PL129JC0
์ƒ์„ธ๋‚ด์šฉ  Stacked Multi-Chip Product (MCP) Flash Memory
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S71PL129JC0 ๋ฐ์ดํ„ฐ์‹œํŠธ(HTML) 65 Page - SPANSION

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June 4, 2004 S29PL129J_MCP_00_A0
S29PL129J for MCP
65
Advance
Informatio n
AC Characteristics
Test Conditions
Switching Waveforms
Note: Diodes are IN3064 or equivalent
Figure 9.
Test Setups
Table 16. Test Specifications
Test Condition
All Speeds
Unit
Output Load
1 TTL gate
Output Load Capacitance, CL (including jig capacitance)
30
pF
Input Rise and Fall Times
VIO = 3.0 V
5
ns
Input Pulse Levels
VIO = 3.0 V
0.0โ€“3.0
V
Input timing measurement reference levels
VIO/2
V
Output timing measurement reference levels
VIO/2
V
Table 17. Key to Switching Waveforms
Waveform
Inputs
Outputs
Steady
Changing from H to L
Changing from L to H
Donโ€™t Care, Any Change Permitted
Changing, State Unknown
Does Not Apply
Center Line is High Impedance State (High Z)
2.7 kโ„ฆ
CL
6.2 kโ„ฆ
3.6 V
Device
Under
Test
VIO = 3.0 V


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