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H27UCG8T2BTR-BC 데이터시트(PDF) 53 Page - Hynix Semiconductor |
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H27UCG8T2BTR-BC 데이터시트(HTML) 53 Page - Hynix Semiconductor |
53 / 56 page H27UCG8T2BTR-BC 64Gb(8192M x 8bit) MLC NAND Flash Rev 0.1 / Oct. 2012 53 Figure 52 : Ready / Busy 5.2. Ready / Busy The device has a Ready/Busy output that provides method of indicating the completion of a page program, erase, copy-back and random read completion. The R/B# pin is normally high and goes to low when the device is busy (after a reset, read, program, and erase operation). It returns to high when the internal controller has finished the operation. The pin is an open-drain driver thereby allowing two or more R/B# outputs to be Or-tied. Because pull-up resistor value is related to tR (R/B#) and current drain during busy (Ibusy), an appropriate value can be obtained with the following reference chart (Figure 52). Its value can be determined by the following guidance. |
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