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TC94A23F 데이터시트(PDF) 9 Page - Toshiba Semiconductor |
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TC94A23F 데이터시트(HTML) 9 Page - Toshiba Semiconductor |
9 / 20 page TC94A23F 2002-02-06 9 Pin Number Symbol Pin Name Function and Operation Remarks 43 DOUT Digital output in. 44 SBSY Sub code block sync output pin. When sub code sync is detected, outputs High at the S1 position. 45 SBOK Sub code Q data CRCC result output pin. When the result is OK, outputs High. 46, 75 VDD 47, 76 VSS Power supply pins for CD digital block. Normally, 5 V is applied. When CD is not used (CD off), the power supply can be set to off except to the controller, enabling only the controller to operate. At this time, 1 must be set in the CDoff bit. If pins from 11 to 18 and 39 to 42 are set as CD control signal input/output pins, setting the CDoff bit to 1 switches all the pins to an output port. 48 P2VREF 2VREF pin for PLL block ¾ 49 PDO Outputs phase error signal between the EFM and PLCK signals. 50 TMAX TMAX detection result output pin. Selected by command bit TMPS. Longer than the specified cycle: Outputs P2VREF. Shorter than the specified cycle: Outputs Low level (VSS). Within the specified cycle: at high impedance 51 LPFN Inverted input pin for low-pass filter amp. 52 LPFO Output pin for low-pass filter amp. 53 PVREF VREF pin for PLL block 54 VCOF VCO filter pin 55 AVSS CD processor control input/output Ground pin for analog block ¾ VDD VDD MVSS P2VREF PVREF P2VREF VCO PVREF AVDD LPFN LPFO PVREF VCOF |
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