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ST25E64EB1TR 데이터시트(PDF) 6 Page - STMicroelectronics |
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ST25E64EB1TR 데이터시트(HTML) 6 Page - STMicroelectronics |
6 / 16 page Symbol Alt Parameter Min Max Unit tCH1CH2 tR Clock Rise Time 300 ns tCL1CL2 tF Clock Fall Time 300 ns tDH1DH2 (1) tR SDA Rise Time 20 300 ns tDL1DL1 (1) tF SDA Fall Time 20 300 ns tCHDX (2) tSU:STA Clock High to Input Transition 600 ns tCHCL tHIGH Clock Pulse Width High 600 ns tDLCL tHD:STA Input Low to Clock Low (START) 600 ns tCLDX tHD:DAT Clock Low to Input Transition 0 µs tCLCH tLOW Clock Pulse Width Low 1.3 µs tDXCX tSU:DAT Input Transition to Clock Transition 100 ns tCHDH tSU:STO Clock High to Input High (STOP) 600 ns tDHDL tBUF Input High to Input Low (Bus Free) 1.3 µs tCLQV (3) tAA Clock Low to Next Data Out Valid 200 1000 ns tCLQX tDH Data Out Hold Time 200 ns fC fSCL Clock Frequency 400 kHz tW tWR Write Time 10 ms Notes: 1. Sampled only, not 100% tested. 2. For a reSTART condition, or following a write cycle. 3. The minimum value delays the falling/rising edge of SDA away from SCL = 1 in order to avoid unwanted START and/or STOP conditions. Table 7. AC Characteristics (TA = –40 to 85 °C or 0 to 70 °C; VCC = 4.5V to 5.5V or 2.5V to 5.5V) Memory Addressing. A data byte in the memory is addressed through 2 bytes of address informa- tion. The Most Significant Byte is sent first and the Least significant Byte is sent after. The Least Sig- nificant Byte addresses a block of 256 bytes, bits b12,b11,b10,b9,b8 of the Most Significant Byte select one block among 32 blocks (one block is 256 bytes). Most Significant Byte X X X b12 b11 b10 b9 b8 X = Don’t Care. Least Significant Byte b7 b6 b5 b4 b3 b2 b1 b0 DEVICE OPERATION (cont’d) Input Rise and Fall Times ≤ 50ns Input Pulse Voltages 0.2VCC to 0.8VCC Input and Output Timing Ref. Voltages 0.3VCC to 0.7VCC AC MEASUREMENT CONDITIONS AI00825 0.8VCC 0.2VCC 0.7VCC 0.3VCC Figure 4. AC Testing Input Output Waveforms 6/16 ST24E64, ST25E64 |
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