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S-1112B21MC-L6GTFX 데이터시트(PDF) 14 Page - ABLIC Inc. |
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S-1112B21MC-L6GTFX 데이터시트(HTML) 14 Page - ABLIC Inc. |
14 / 30 page HIGH RIPPLE-REJECTION AND LOW DROPOUT CMOS VOLTAGE REGULATOR S-1112/1122 Series Rev.6.1_02 14 Operation 1. Basic operation Figure 12 shows the block diagram of the S-1112/1122 Series. The error amplifier compares the reference voltage (Vref) with feedback voltage (Vfb), which is the output voltage resistance-divided by feedback resistors (Rs and Rf). It supplies the gate voltage necessary to maintain the constant output voltage which is not influenced by the input voltage and temperature change, to the output transistor. *1 *1. Parasitic diode VSS Current supply Vfb Vref VIN VOUT Rf Rs Error amplifier Reference voltage circuit Figure 12 2. Output transistor In the S-1112/1122 Series, a low on-resistance P-channel MOS FET is used as the output transistor. Be sure that VOUT does not exceed VIN 0.3 V to prevent the voltage regulator from being damaged due to reverse current flowing from the VOUT pin through a parasitic diode to the VIN pin, when the potential of VOUT became higher than VIN. |
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