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FAN2534 데이터시트(PDF) 6 Page - Fairchild Semiconductor

부품명 FAN2534
상세설명  150 mA CMOS LDO Regulator with Fast Start, Enable
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제조업체  FAIRCHILD [Fairchild Semiconductor]
홈페이지  http://www.fairchildsemi.com
Logo FAIRCHILD - Fairchild Semiconductor

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FAN2534/FAN2535
PRODUCT SPECIFICATION
6
REV. 1.0.2 8/26/03
Control Functions
Enable Pin
Connecting 2.0V or greater to the Enable pin will enable the
output, while 0.4V or less will disable it while reducing the
quiescent current consumption to less than 1µA. If this
shutdown function is not needed, the pin can simply be
connected permanently to the VIN pin. Allowing this pin
to float will cause erratic operation.
Error Flag (FAN2535-XX Only)
Fault conditions such as input voltage dropout
(low VIN), overheating, or overloading (excessive output
current), will set an error flag: The ERR pin which is an
open-drain output, will go LOW when VOUT is less than
95% or the specified output voltage. When the voltage at
VOUT is greater than 95% of the specified output voltage,
the ERR pin is HIGH. A logic pullup resistor of 100K Ohm
is recommended at this output. The pin can be left discon-
nected if unused.
Thermal Protection
The FAN2534/FAN2535 is designed to supply high peak
output currents for brief periods, however sustained exces-
sive output load at high input - output voltage difference
will cause the device temperature to increase and exceed
maximum ratings due to power dissipation. During output
overload conditions, when the die temperature exceeds the
shutdown limit temperature of 155°C, an onboard thermal
protection will disable the output until the temperature drops
approximately 15°C below the limit, at which point the
output is re-enabled. During a thermal shutdown situation
the user may assert the power-down function at the Enable
pin, reducing power consumption to a minimum.
Thermal Characteristics
The FAN2534/FAN2535 is designed to supply 150mA at
the specified output voltage with an operating die (junction)
temperature of up to 125°C. Once the power dissipation and
thermal resistance is known, the maximum junction tempera-
ture of the device can be calculated. While the power dissipa-
tion is calculated from known electrical parameters, the
actual thermal resistance depends on the thermal characteris-
tics of the SOT23-5 surface-mount package and the
surrounding PC Board copper to which it is mounted.
The power dissipation is equal to the product of the input-to-
output voltage differential and the output current plus the
ground current multiplied by the input voltage, or:
The ground pin current IGND can be found in the charts
provided in the Electrical Characteristics section.
The relationship describing the thermal behavior of the
package is:
where TJ(max) is the maximum allowable junction tempera-
ture of the die, which is 125°C, and TA is the ambient operat-
ing temperature.
θJA is dependent on the surrounding PC
board layout and can be empirically obtained. While the
θJC
(junction-to-case) of the SOT23-5 package is specified at
130°C /W, the
θJA of the minimum PWB footprint will be at
least 235°C /W. This can be improved upon by providing a
heat sink of surrounding copper ground on the PWB.
Depending on the size of the copper area, the resulting
θJA
can range from approximately 180°C /W for one square inch
to nearly 130°C /W for 4 square inches. The addition of
backside copper with through-holes, stiffeners, and other
enhancements can also aid in reducing thermal resistance.
The heat contributed by the dissipation of other devices
located nearby must be included in the design consider-
ations. Once the limiting parameters in these two relation-
ships have been determined, the design can be modified to
ensure that the device remains within specified operating
conditions. If overload conditions are not considered, it is
possible for the device to enter a thermal cycling loop, in
which the circuit enters a shutdown condition, cools, re-
enables, and then again overheats and shuts down repeatedly
due to an unmanaged fault condition.
Adjustable Version
The FAN2534 adjustable version includes an input pin ADJ
which allows the user to select an output voltage ranging
from 2.5V to near VIN, using an external resistor divider. The
voltage VADJ presented to the ADJ pin is fed to the onboard
error amplifier which adjusts the output voltage until VADJ is
equal to the onboard bandgap reference voltage of
1.00V(typ). The equation is:
Since the bandgap reference voltage is trimmed, 1% initial
accuracy can be achieved. The total value of the resistor
chain should not exceed 250K Ohm total to keep the error
amplifier biased during no-load conditions. Programming
output voltages very near VIN need to allow for the magni-
tude and variation of the dropout voltage VDO over load,
supply, and temperature variations. Note that the low-leak-
age FET input to the CMOS Error Amplifier induces no bias
current error to the calculation.
P
D
V
IN
V
OUT
()I
OUT
V
INIGND
+
=
P
D max
()
T
J max
() TA
θ
JA
-------------------------------



=
V
OUT
1.00V
1
R
upper
R
lower
----------------
+
×
=


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