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FAN5069 데이터시트(PDF) 11 Page - Fairchild Semiconductor |
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FAN5069 데이터시트(HTML) 11 Page - Fairchild Semiconductor |
11 / 20 page 11 www.fairchildsemi.com FAN5069 Rev. 1.1.0 Oscillator Clock Frequency (PWM) The clock frequency on the oscillator is set using an external resistor, connected between R(T) pin and ground. The fre- quency follows the graph as shown in Figure 18. The minimum clock frequency is 200KHz which is when R(T) pin is left open. Select the value of R(T) as shown in the equation below. This equation is valid for all FOSC > 200kHz. (EQ. 2) Where FOSC is in Hz. For example for FOSC = 300kHz, R(T) = 50KΩ. RRAMP Selection and Feed Forward Operation The FAN5069 provides for feed forward function through RRAMP. The value of RRAMP effectively changes the slope of the internal ramp keeping the gain of the modulator constant for changes in input voltage. RRAMP also affects the current limit as explained in the later sections. The minimum value recommended to use for RRAMP is 400KΩ at maximum input voltage of 24V. For other input voltages (E.g. 8V), calculate RRAMP resistor using the fol- lowing equation: (EQ. 3) Gate Drive Section The adaptive gate control logic translates the internal PWM control signal into the MOSFET gate drive signals and provides necessary amplification, level shifting, and shoot-through pro- tection. Also, it has functions that help optimize the IC perfor- mance over a wide range of operating conditions. Since the MOSFET switching time can vary dramatically from device to device and with the input voltage, the gate control logic provides adaptive dead time by monitoring the gate-to-source voltages of both upper and lower MOSFETs. The lower MOSFET drive is not turned on until the gate-to-source voltage of the upper MOS- FET has decreased to less than approximately 1V. Similarly, the upper MOSFET is not turned on until the gate-to-source voltage of the lower MOSFET has decreased to less than approximately 1V. This allows a wide variety of upper and lower MOSFETs to be used without a concern for simultaneous conduction, or shoot-through. A low impedance path between the driver pin and the MOSFET gate is recommended for the adaptive dead-time circuit to work properly. Any delay along this path reduces the delay generated by the adaptive dead-time circuit thereby increasing the chances for shoot-through. Protection In the FAN5069, the converter is protected against extreme over load, short circuit, over voltage, and under voltage conditions. All of these extreme conditions generate an internal “fault latch” which shuts down the converter. For all fault conditions both the high-side and the low-side drives are off except in the case of OVP where the low-side MOSFET is turned on until the voltage on the FB pin goes below 0.4V. The fault latch can be reset either by toggling the EN pin or recycling VCC to the chip. Over Current Limit (PWM) The PWM converter is protected against overloading through a cycle-by-cycle current limit set by selecting RILIM resistor. An internal 10µA current source sets the threshold voltage for the output of the summing amplifier. When the summing amplifier output exceeds this threshold level, the current limit comparator trips and the PWM starts skipping pulses. If the current limit trip- ping occurs for 16 continuous clock cycles, a fault latch is set and the controller shuts down the converter. This shut down fea- ture is disabled during the start-up until the voltage on the SS capacitor crosses 1.2V. To achieve current limit, the FAN5069 monitors the inductor cur- rent during the OFF time by monitoring and holding the voltage across the lower MOSFET. The voltage across the lower MOS- FET is sensed between the PGND and the SW pins. The output of the summing amplifier is a function of the inductor current, RDS_ON of the bottom FET and the gain of the current sense amplifier. With the RDS_ON method of current sensing, the current limit can vary widely from unit to unit. RDS_ON not only varies from unit to unit, but also has a typical junction tem- perature coefficient of about 0.4%/°C (consult the MOSFET datasheet for actual values). Hence, the set point of the actual current limit decreases in proportion to increase in MOSFET die temperature. A factor of 1.6 in the current limit set point typically compensates for all MOSFET RDS_ON variations, assuming the MOSFET's heat sinking will keep its operating die temperature below 125°C. For more accurate current limit setting, use resistor sensing. In a resistor sensing scheme, an appropriate current sense resis- tor is connected between the source terminal of the bottom MOSFET and PGND. Set the current limit by selecting RILIM as follows: (EQ. 4) Where RILIM is in KΩ, IMAX is the maximum load current. K1 is a constant to compensate for the variation of MOSFET RDS_ON. Typically, this value is 1.6. With K1=1.6, IMAX=10A, RDS_ON=7mΩ, VIN=24V, VOUT=1.5V, FSW = 300KHz, and RRAMP=400KΩ, RILIM equals 168.18 KΩ. Auto Restart (PWM) The FAN5069 supports two modes of response when the inter- nal fault latch is set. The user can configure it to keep the power supply latched in the OFF state OR in the Auto Restart mode. When the EN pin is tied to VCC, the power supply is latched OFF. When the EN pin is terminated with a 100nF to GND, the power supply is in Auto Restart mode. The table below describes the relationship between PWM restart and setting on EN pin. Do not leave the EN pin open without any capacitor. RT () 510 9 × F OSC 200 103 × – () ---------------------------------------------------- Ω = R RAMP V IN 1.8 – 55 10 6 – × ------------------------- = EN Pin PWM/Restart Pull to GND OFF VCC No restart after fault Cap to GND Restart after TDELAY (Sec.) = Where C is in μF R ILIM 128 K1 I × MAX R DS ON – × 0.0625 -------------------------------------------------------------- 1 1.8 V IN ---------- – ⎝⎠ ⎛⎞ V OUT 33.2 1011 × × F SW R RAMP × ------------------------------------------------------- × ⎝⎠ ⎜⎟ ⎛⎞ ++ K Ω = 0.85 C × |
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