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AM42BDS640AG 데이터시트(PDF) 63 Page - SPANSION

부품명 AM42BDS640AG
부품 상세설명  Stacked Multi-Chip Package (MCP) Flash Memory and SRAM
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AM42BDS640AG 데이터시트(HTML) 63 Page - SPANSION

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Am42BDS640AG
November 1, 2002
P R E L I M INARY
AC CHARACTERISTICS
Note: Breakpoints in waveforms indicate that system may alternately read array data from the “non-busy bank” while checking
the status of the program or erase operation in the “busy” bank. The system should read status twice to ensure valid information.
Figure 33.
Back-to-Back Read/Write Cycle Timings
OE#
CE#f
WE#
tOEH
Data
Addresses
AVD#
PD/30h
AAh
RA
PA/SA
tWC
tDS
tDH
tRC
tRC
tOE
tAS
tAH
tACC
tOEH
tWP
tGHWL
tOEZ
tWC
tSR/W
Last Cycle in
Program or
Sector Erase
Command Sequence
Read status (at least two cycles) in same bank
and/or array data from other bank
Begin another
write or program
command sequence
RD
RA
555h
RD
tWPH


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