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MSP430FG4619 ๋ฐ์ดํ„ฐ์‹œํŠธ(HTML) 33 Page - Texas Instruments

๋ถ€ํ’ˆ๋ช… MSP430FG4619
์ƒ์„ธ๋‚ด์šฉ  MSP430FG461x, MSP430CG461x Mixed-Signal Microcontrollers
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MSP430FG4619 ๋ฐ์ดํ„ฐ์‹œํŠธ(HTML) 33 Page - Texas Instruments

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SDA
SCL
t
LOW
t
HD , DAT
t
SU , DAT
t
HD , STA
t
SU , STA
t
HD , STA
t
HIGH
t
SU , STO
t
SP
t
BUF
33
MSP430FG4619, MSP430FG4618, MSP430FG4617, MSP430FG4616
MSP430CG4619, MSP430CG4618, MSP430CG4617, MSP430CG4616
www.ti.com
SLAS508K โ€“ APRIL 2006 โ€“ REVISED MAY 2020
Submit Documentation Feedback
Product Folder Links: MSP430FG4619 MSP430FG4618 MSP430FG4617 MSP430FG4616 MSP430CG4619
MSP430CG4618 MSP430CG4617 MSP430CG4616
Specifications
Copyright ยฉ 2006โ€“2020, Texas Instruments Incorporated
5.25
USCI (I
2C Mode)
over recommended ranges of supply voltage and operating free-air temperature (unless otherwise noted) (see Figure 5-22)
PARAMETER
TEST CONDITIONS
VCC
MIN
TYP
MAX UNIT
fUSCI
USCI input clock frequency
Internal: SMCLK, ACLK
External: UCLK
Duty Cycle = 50% ยฑ10%
fSYSTEM MHz
fSCL
SCL clock frequency
2.2 V, 3 V
0
400
kHz
tHD,STA
Hold time (repeated) START
fSCL โ‰ค 100 kHz
2.2 V, 3 V
4
ยตs
fSCL > 100 kHz
2.2 V, 3 V
0.6
tSU,STA
Setup time for a repeated START
fSCL โ‰ค 100 kHz
2.2 V, 3 V
4.7
ยตs
fSCL > 100 kHz
2.2 V, 3 V
0.6
tHD,DAT
Data hold time
2.2 V, 3 V
0
ns
tSU,DAT
Data setup time
2.2 V, 3 V
250
ns
tSU,STO
Setup time for STOP
2.2 V, 3 V
4
ยตs
tSP
Pulse duration of spikes suppressed by
input filter
2.2 V
50
150
600
ns
3 V
50
100
600
Figure 5-22. I2C Mode Timing
(1)
The signal applied to the USART1 receive signal (terminal) (URXD1) must meet the timing requirements of t(ฯ„) to ensure that the URXS
flip-flop is set. The URXS flip-flop is set with negative pulses that meet the minimum-timing condition of t(ฯ„). The operating conditions to
set the flag must be met independently from this timing constraint. The deglitch circuitry is active only on negative transitions on the
URXD1 line.
5.26
USART1
over recommended ranges of supply voltage and operating free-air temperature (unless otherwise noted)
(1)
PARAMETER
TEST CONDITIONS
MIN
TYP
MAX
UNIT
t(ฯ„)
USART1 deglitch time
VCC = 2.2 V, SYNC = 0, UART mode
200
430
800
ns
VCC = 3 V, SYNC = 0, UART mode
150
280
500


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