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MSP430FR6007 데이터시트(PDF) 96 Page - Texas Instruments |
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MSP430FR6007 데이터시트(HTML) 96 Page - Texas Instruments |
96 / 179 page PxSEL1.x PxDIR.x PxIN.x EN To modules PxOUT.x 1 0 DVSS DVCC 1 D To Comparator From Comparator Pad Logic To ADC From ADC Bus Keeper Direction 0: Input 1: Output CBPD.x PxREN.x 0 1 0 0 1 0 1 1 PxSEL0.x 0 1 0 0 1 0 1 1 module 1 or DVSS module 2 or DVSS module 3 or DVSS module 1 or PxDIR.x module 2 or PxDIR.x module 3 or PxDIR.x 96 MSP430FR6007, MSP430FR6005 SLASEV3 – MARCH 2020 www.ti.com Submit Documentation Feedback Product Folder Links: MSP430FR6007 MSP430FR6005 Detailed Description Copyright © 2020, Texas Instruments Incorporated 6.14.3 Port P1 (P1.2 to P1.7) Input/Output With Schmitt Trigger Figure 6-4 shows the port diagram. Table 6-26 summarizes the selection of the pin function. NOTE: Functional representation only. Figure 6-4. Port P1 (P1.2 to P1.7) Diagram |
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