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TLV767-Q1 데이터시트(PDF) 19 Page - Texas Instruments |
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TLV767-Q1 데이터시트(HTML) 19 Page - Texas Instruments |
19 / 28 page 19 TLV767-Q1 www.ti.com SBVS381 – APRIL 2020 Product Folder Links: TLV767-Q1 Submit Documentation Feedback Copyright © 2020, Texas Instruments Incorporated Application Information (continued) 8.1.6 Power Dissipation (PD) Circuit reliability requires consideration of the device power dissipation, location of the circuit on the printed circuit board (PCB), and correct sizing of the thermal plane. The PCB area around the regulator must have few or no other heat-generating devices that cause added thermal stress. To first-order approximation, power dissipation in the regulator depends on the input-to-output voltage difference and load conditions. Equation 7 calculates power dissipation (PD). PD = (VIN – VOUT) × IOUT (7) NOTE Power dissipation can be minimized, and therefore greater efficiency can be achieved, by correct selection of the system voltage rails. For the lowest power dissipation use the minimum input voltage required for correct output regulation. For devices with a thermal pad, the primary heat conduction path for the device package is through the thermal pad to the PCB. Solder the thermal pad to a copper pad area under the device. This pad area must contain an array of plated vias that conduct heat to additional copper planes for increased heat dissipation. The maximum power dissipation determines the maximum allowable ambient temperature (TA) for the device. According to Equation 8, power dissipation and junction temperature are most often related by the junction-to- ambient thermal resistance (RθJA) of the combined PCB and device package and the temperature of the ambient air (TA). TJ = TA + (RθJA × PD) (8) Thermal resistance (RθJA) is highly dependent on the heat-spreading capability built into the particular PCB design, and therefore varies according to the total copper area, copper weight, and location of the planes. The junction-to-ambient thermal resistance listed in the Thermal Information table is determined by the JEDEC standard PCB and copper-spreading area, and is used as a relative measure of package thermal performance. 8.1.7 Estimating Junction Temperature The JEDEC standard now recommends the use of psi (Ψ) thermal metrics to estimate the junction temperatures of the linear regulator when in-circuit on a typical PCB board application. These metrics are not thermal resistance parameters and instead offer a practical and relative way to estimate junction temperature. These psi metrics are determined to be significantly independent of the copper area available for heat-spreading. The Thermal Information table lists the primary thermal metrics, which are the junction-to-top characterization parameter (ψJT) and junction-to-board characterization parameter (ψJB). These parameters provide two methods for calculating the junction temperature (TJ). As described in , use the junction-to-top characterization parameter (ψJT) with the temperature at the center-top of device package (TT) to calculate the junction temperature. As described in , use the junction-to-board characterization parameter (ψJB) with the PCB surface temperature 1 mm from the device package (TB) to calculate the junction temperature. TJ = TT + ψJT × PD where: • PD is the dissipated power • TT is the temperature at the center-top of the device package (9) TJ = TB + ψJB × PD where • TB is the PCB surface temperature measured 1 mm from the device package and centered on the package edge (10) For detailed information on the thermal metrics and how to use them, see the Semiconductor and IC Package Thermal Metrics application report. |
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