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ITS4075Q-EP-D 데이터시트(PDF) 38 Page - Infineon Technologies AG |
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ITS4075Q-EP-D 데이터시트(HTML) 38 Page - Infineon Technologies AG |
38 / 42 page Data Sheet 38 Rev. 1.01 2018-06-14 ITS4075Q-EP-D 75 mΩ Quad Channel Smart High-Side Power Switch Application Information protect the external control circuitry and the input structures of the ITS4075Q-EP-D under fault conditions (like e.g. reverse polarity, loss of ground or overvoltage). For further details please also refer to the corresponding sections in Chapter 6. The recommended value for such serial input resistors is 10 kΩ however application specific optimized values may also depend on the individual application conditions as well as the applied external control circuitry / microcontroller. 9.2 Thermal Considerations If the cooling possibilities within the application are not sufficient to sink the heat of the dissipated power the junction temperature Tj of the device may exceed its maximum specified rating of 150°C and eventually trigger a thermal shutdown of the overheated channels to protect the device from destruction. Such thermal shutdown events may occur e.g. if one or more channels are operated in overload conditions that are causing the current limitation functionality to become active. If the current limitation of a channel becomes active the power dissipation will rise rapidly and in many cases lead to thermal shutdown events of the corresponding channels within short periods of time. But also under nominal load conditions the power dissipation can become too high inside an application if it is applied at high environmental temperature TAMB and if at the same time the cooling capability of the PCB is not sufficient. In general the cooling capability of an IC on a PCB within an application can be described for static cases by its thermal resistance from junction-to-ambient RthJA. The thermal resistance RthJA can be improved by adding cooling area on top- or bottom layer of the PCB or by adding inner layers that are connected to the VS layer with thermal vias. Thermal vias show the best efficiency for heat distribution if directly placed underneath the exposed pad of the ITS4075Q-EP-D. The achievable values for RthJA will differ from application to application. As reference simulation values of RthJA for a set of standardized JEDEC cases are provided in Chapter 4.4 “Thermal Resistance” on Page 12. Actual values in real applications naturally can be lower or higher. For cases where the achievable thermal resistance RthJA and the hereof resulting thermal budget within an application is not sufficient for a given ambient temperature TAMB there is no other choice than to lower the load current to smaller numbers than the allowed maximum nominal current of 2.6 A. Figure 22 illustrates how the derating of the nominal current due to excessive power dissipation can look like as a function of achievable RthJA and given TAMB. The graphs show how the thermal budget with its limiting condition Tj = 150°C can be shared between the influencing parameters TAMB, RthJA, ILoad depending on the number of active channels nCH. Next to the standardized JEDEC cases mentioned above also an arbitrarily chosen value of RthJA = 25 K/W as additional reference for a highly optimized PCB solution is included in the graphs. The calculation of the thermal budget displayed in the graphs follows simple rules as given in the equations below. It should be noted that the calculation is restricted to static cases where the resulting TAMB and Tj have reached a stable equilibrium. (9.1) (9.2) Tj = TAMB + RthJA × PDISS PDISS = ILoad 2 × RDS(ON) × nCH + VS × IGND |
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