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IMX8MNIEC 데이터시트(PDF) 65 Page - NXP Semiconductors |
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65 / 89 page Electrical characteristics i.MX 8M Nano Applications Processor Datasheet for Industrial Products, Rev. 0.1, 03/2020 NXP Semiconductors 65 Figure 43. SPDIF_SR_CLK timing diagram Figure 44. SPDIF_ST_CLK timing diagram 3.9.12 UART I/O configuration and timing parameters 3.9.12.1 UART RS-232 I/O configuration in different modes The i.MX 8M Nano UART interfaces can serve both as DTE or DCE device. This can be configured by the DCEDTE control bit (default 0—DCE mode). Table 58 shows the UART I/O configuration based on the enabled mode. 3.9.12.2 UART RS-232 Serial mode timing This section describes the electrical information of the UART module in the RS-232 mode. Table 58. UART I/O configuration vs. mode Port DTE Mode DCE Mode Direction Description Direction Description UARTx_RTS_B Output UARTx_RTS_B from DTE to DCE Input UARTx_RTS_B from DTE to DCE UARTx_CTS_B Input UARTx_CTS_B from DCE to DTE Output UARTx_CTS_B from DCE to DTE UARTx_TX_DATA Input Serial data from DCE to DTE Output Serial data from DCE to DTE UARTx_RX_DATA Output Serial data from DTE to DCE Input Serial data from DTE to DCE SPDIF_SR_CLK (Output) VM VM srckp srckph srckpl SPDIF_ST_CLK (Input) VM VM stclkp stclkph stclkpl |
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