8 Detailed Description

8.1 Overview

LVDS drivers and receivers are intended to be primarily used in a simple point-to-point configuration as is shown

in Figure 9-1. This configuration provides a clean signaling environment for the fast edge rates of the drivers.

The receiver is connected to the source through a impedance controlled 100 Ω differential PCB traces. A

termination resistor of 100 Ω should be used, and is located as close to the receiver input pins as possible. The

termination resistor converts the driver output (current mode) into a voltage that is detected by the receiver.

8.2 Functional Block Diagram

R

R

R

R

R

R

R

R

8.3 Feature Description

The DS90LV028A-Q1 differential line receiver is capable of detecting signals as low as 100 mV, over a common-

+1.2V. The driven signal is centered around this voltage and may shift ±0.5V around this center point. The ±0.5V

shifting may be the result of a ground potential difference between the driver's ground reference and the

receiver's ground reference, the common-mode effects of coupled noise, or a combination of the two. The AC

parameters of both receiver input pins are optimized for a recommended operating input voltage range of +0.5V

8.4 Device Functional Modes

Table 8-1. Truth Table

INPUTS

OUTPUT

H

L

?(1)

(1)

? indicates state is indeterminate

DS90LV028A-Q1

SNLS672 – AUGUST 2020

www.ti.com

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