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SN74LS280 데이터시트(PDF) 1 Page - ON Semiconductor |
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SN74LS280 데이터시트(HTML) 1 Page - ON Semiconductor |
1 / 4 page © Semiconductor Components Industries, LLC, 1999 December, 1999 – Rev. 6 1 Publication Order Number: SN74LS280/D SN74LS280 9-Bit Odd/Even Parity Generators/Checkers The SN74LS280 is a Universal 9-Bit Parity Generator / Checker. It features odd / even outputs to facilitate either odd or even parity. By cascading, the word length is easily expanded. The LS280 is designed without the expander input implementation, but the corresponding function is provided by an input at Pin 4 and the absence of any connection at Pin 3. This design permits the LS280 to be substituted for the LS180 which results in improved performance. The LS280 has buffered inputs to lower the drive requirements to one LS unit load. • Generates Either Odd or Even Parity for Nine Data Lines • Typical Data-to-Output Delay of only 33 ns • Cascadable for n-Bits • Can Be Used To Upgrade Systems Using MSI Parity Circuits • Typical Power Dissipation = 80 mW 14 13 12 11 10 9 123 456 8 7 VCC FE D C B A G H NC I ∑ EVEN GND FE D C B A G HI INPUTS INPUT OUTPUTS ∑ ODD ∑ EVEN ∑ ODD INPUTS FUNCTION TABLE NUMBER OF INPUTS A OUTPUTS THRU 1 THAT ARE HIGH ∑EVEN ∑ODD 0, 2, 4, 6, 8 H L 1, 3, 5, 7, 9 L H H = HIGH Level, L = LOW Level GUARANTEED OPERATING RANGES Symbol Parameter Min Typ Max Unit VCC Supply Voltage 4.75 5.0 5.25 V TA Operating Ambient Temperature Range 0 25 70 °C IOH Output Current – High – 0.4 mA IOL Output Current – Low 8.0 mA LOW POWER SCHOTTKY Device Package Shipping ORDERING INFORMATION SN74LS280N 14 Pin DIP 2000 Units/Box SN74LS280D 14 Pin SOIC D SUFFIX CASE 751A http://onsemi.com 2500/Tape & Reel PLASTIC N SUFFIX CASE 646 14 1 14 1 |
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