전자부품 데이터시트 검색엔진
  Korean  ▼

Delete All
ON OFF
ALLDATASHEET.CO.KR

X  

Preview PDF Download HTML

AM29N323D 데이터시트(HTML) 4 Page - Advanced Micro Devices

부품명 AM29N323D
상세내용  32 Megabit (2 M x 16-Bit) CMOS 1.8 Volt-only Simultaneous Read/Write, Burst Mode Flash Memory
Download  48 Pages
Scroll/Zoom Zoom In 100% Zoom Out
제조사  AMD [Advanced Micro Devices]
홈페이지  http://www.amd.com
Logo AMD - Advanced Micro Devices

AM29N323D 데이터시트(HTML) 4 Page - Advanced Micro Devices

  AM29N323D 데이터시트 HTML 1Page - Advanced Micro Devices AM29N323D 데이터시트 HTML 2Page - Advanced Micro Devices AM29N323D 데이터시트 HTML 3Page - Advanced Micro Devices AM29N323D 데이터시트 HTML 4Page - Advanced Micro Devices AM29N323D 데이터시트 HTML 5Page - Advanced Micro Devices AM29N323D 데이터시트 HTML 6Page - Advanced Micro Devices AM29N323D 데이터시트 HTML 7Page - Advanced Micro Devices AM29N323D 데이터시트 HTML 8Page - Advanced Micro Devices AM29N323D 데이터시트 HTML 9Page - Advanced Micro Devices Next Button
Zoom Inzoom in Zoom Outzoom out
 4 / 48 page
background image
August 8, 2002
Am29N323D
3
TABLE OF CONTENTS
Product Selector Guide . . . . . . . . . . . . . . . . . . . . . 4
Block Diagram . . . . . . . . . . . . . . . . . . . . . . . . . . . . 4
Block Diagram of
Simultaneous Operation Circuit . . . . . . . . . . . . . . 5
Connection Diagram . . . . . . . . . . . . . . . . . . . . . . . . 6
Special Handling Instructions for FBGA Package .................... 6
Input/Output Descriptions . . . . . . . . . . . . . . . . . . . 7
Logic Symbol . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 7
Ordering Information . . . . . . . . . . . . . . . . . . . . . . . 8
Device Bus Operations . . . . . . . . . . . . . . . . . . . . . . 9
Table 1. Device Bus Operations ......................................................9
Requirements for Asynchronous Read Operation (Non-Burst) 9
Requirements for Synchronous (Burst) Read Operation .......... 9
Programmable Wait State ...................................................... 10
Power Saving Function ........................................................... 10
Simultaneous Read/Write Operations with Zero Latency ....... 10
Writing Commands/Command Sequences ............................ 10
Accelerated Program Operation ............................................. 11
Autoselect Functions .............................................................. 11
Automatic Sleep Mode ........................................................... 11
RESET#: Hardware Reset Input ............................................. 11
Output Disable Mode .............................................................. 11
Hardware Data Protection ...................................................... 11
Low VCC Write Inhibit ............................................................ 12
Write Pulse “Glitch” Protection ............................................... 12
Logical Inhibit .......................................................................... 12
Table 2. Sector Address Table ........................................................13
Command Definitions . . . . . . . . . . . . . . . . . . . . . . 15
Reading Array Data ................................................................ 15
Set Wait State Command Sequence ...................................... 15
Table 3. Third Cycle Address/Data .................................................15
Enable PS (Power Saving) Mode Command Sequence ........ 15
Sector Lock/Unlock Command Sequence .............................. 15
Reset Command ..................................................................... 15
Autoselect Command Sequence ............................................ 16
Program Command Sequence ............................................... 16
Unlock Bypass Command Sequence ..................................... 16
Figure 1. Program Operation .......................................................... 17
Chip Erase Command Sequence ........................................... 18
Sector Erase Command Sequence ........................................ 18
Erase Suspend/Erase Resume Commands ........................... 19
Figure 2. Erase Operation............................................................... 19
Table 4. Command Definitions .......................................................20
Write Operation Status . . . . . . . . . . . . . . . . . . . . . 21
DQ7: Data# Polling ................................................................. 21
Figure 3. Data# Polling Algorithm ................................................... 21
DQ6: Toggle Bit I .................................................................... 22
Figure 4. Toggle Bit Algorithm......................................................... 22
DQ2: Toggle Bit II ................................................................... 23
Table 5. DQ6 and DQ2 Indications ................................................ 23
Reading Toggle Bits DQ6/DQ2 ............................................... 23
DQ5: Exceeded Timing Limits ................................................ 23
DQ3: Sector Erase Timer ....................................................... 24
Table 6. Write Operation Status ..................................................... 24
Absolute Maximum Ratings . . . . . . . . . . . . . . . . 25
Figure 5. Maximum Negative Overshoot Waveform ...................... 25
Figure 6. Maximum Positive Overshoot Waveform........................ 25
Operating Ranges . . . . . . . . . . . . . . . . . . . . . . . . . 25
DC Characteristics . . . . . . . . . . . . . . . . . . . . . . . . 26
Test Conditions . . . . . . . . . . . . . . . . . . . . . . . . . . 27
Figure 7. Test Setup....................................................................... 27
Table 7. Test Specifications ........................................................... 27
Key to Switching Waveforms. . . . . . . . . . . . . . . . 27
Switching Waveforms. . . . . . . . . . . . . . . . . . . . . . 27
Figure 8. Input Waveforms and Measurement Levels ................... 27
AC Characteristics . . . . . . . . . . . . . . . . . . . . . . . . 28
Synchronous/Burst Read ........................................................ 28
Figure 9. Burst Mode Read ............................................................ 28
Asynchronous Read ............................................................... 29
Figure 10. Asynchronous Mode Read............................................ 29
Figure 11. Reset Timings ............................................................... 30
Erase/Program Operations ..................................................... 31
Figure 12. Program Operation Timings.......................................... 32
Figure 13. Chip/Sector Erase Operations ...................................... 33
Figure 14. Accelerated Unlock Bypass Programming Timing........ 34
Figure 15. Data# Polling Timings (During Embedded Algorithm) .. 35
Figure 16. Toggle Bit Timings (During Embedded Algorithm)........ 35
Figure 17. Latency with Boundary Crossing .................................. 36
Figure 18. Initial Access with Power Saving (PS)
Function and Address Boundary Latency ...................................... 37
Figure 19. Initial Access with Address Boundary Latency ............. 38
Figure 20. Example of Five Wait States Insertion .......................... 39
Figure 21. Back-to-Back Read/Write Cycle Timings ...................... 40
Erase and Programming Performance . . . . . . . 41
Data Retention. . . . . . . . . . . . . . . . . . . . . . . . . . . . 41
Physical Dimensions* . . . . . . . . . . . . . . . . . . . . . 42
FDD047—47-Pin Fine-Pitch Ball Grid Array
(FBGA) 7 x 10 mm package ................................................... 42
Mask Set Revision . . . . . . . . . . . . . . . . . . . . . . . . 44
Appendix A: Daisy Chain Information . . . . . . . . 45
Table 8. Daisy Chain Part for 32Mbit 0.23 µm Flash Products
(FDD047, 7 x 10 mm) ..................................................................... 45
Table 9. FDD047 Package Information .......................................... 45
Table 10. FDD047 Connections ..................................................... 45
Figure 1. FDD047 Daisy Chain Layout
(Top View, Balls Facing Down) ...................................................... 45
Revision Summary . . . . . . . . . . . . . . . . . . . . . . . . 46


Html Pages

1  2  3  4  5  6  7  8  9  10  11  12  13  14  15  16  17  18  19  20  21  22  23  24  25  26  27  28  29  30  31  32  33  34  35  36  37  38  39  40  41  42  43  44  45  46  47  48 


데이터시트 Download

Go To PDF Page


링크 URL



Privacy Policy
ALLDATASHEET.CO.KR
ALLDATASHEET 가 귀하에 도움이 되셨나요?  [ DONATE ]  

Alldatasheet는?   |   광고문의    |   운영자에게 연락하기   |   개인정보취급방침   |   즐겨찾기   |   링크교환   |   제조사별 검색
All Rights Reserved© Alldatasheet.com


Mirror Sites
English : Alldatasheet.com  |   English : Alldatasheet.net  |   Chinese : Alldatasheetcn.com  |   German : Alldatasheetde.com  |   Japanese : Alldatasheet.jp
Russian : Alldatasheetru.com  |   Korean : Alldatasheet.co.kr  |   Spanish : Alldatasheet.es  |   French : Alldatasheet.fr  |   Italian : Alldatasheetit.com
Portuguese : Alldatasheetpt.com  |   Polish : Alldatasheet.pl  |   Vietnamese : Alldatasheet.vn