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UC2843AN 데이터시트(PDF) 11 Page - ON Semiconductor

부품명 UC2843AN
상세설명  HIGH PERFORMANCE CURRENT MODE CONTROLLERS
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UC2843AN 데이터시트(HTML) 11 Page - ON Semiconductor

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UC3842A, 43A UC2842A, 43A
11
MOTOROLA ANALOG IC DEVICE DATA
Figure 20. External Clock Synchronization
Figure 21. External Duty Cycle Clamp and
Multi Unit Synchronization
Figure 22. Adjustable Reduction of Clamp Level
Figure 23. Soft–Start Circuit
Figure 24. Adjustable Buffered Reduction of
Clamp Level with Soft–Start
Figure 25. Current Sensing Power MOSFET
Virtually lossless current sensing can be achieved with the implementation of a
SENSEFET power switch. For proper operation during over current conditions, a
reduction of the Ipk(max) clamp level must be implemented. Refer to Figures 22 and 24.
The diode clamp is required if the Sync amplitude is large enough to
cause the bottom side of CT to go more than 300 mV below ground.
External
Sync
Input
47
5(9)
R
R
Bias
Osc
Vref
RT
8(14)
4(7)
2(3)
1(1)
0.01
CT
2R
R
EA
+
+
5(9)
R
R
Bias
Osc
8(14)
4(7)
2(3)
1(1)
2R
R
EA
+
+
7
5.0k
3
8
6
5
1
C
R
S
MC1455
2
RA
+
+
4
Q
5.0k
RB
To Additional
UCX84XA’s
f =
1.44
(RA + 2RB)C
Dmax =
RB
RA + 2RB
5(9)
R
R
Bias
Osc
8(14)
4(7)
2(3)
1(1)
2R
R
EA
+
+
Q1
RS
3(5)
5(8)
1.0V
R
S
Q
Comp/Latch
5.0Vref
VClamp
Vin
VCC
7(11)
6(10)
+
+
+
+
7(12)
+
R1 R2
R2
VClamp =
1.67
+ 1
+ 0.33 x 10 – 3Ipk(max) =
VClamp
RS
Where: 0
≤ VClamp ≤ 1.0 V
R2
R1
1.0mA
R1
R1 + R2
5(9)
R
R
Bias
Osc
8(14)
4(7)
2(3)
1(1)
2R
R
EA
+
+
1.0V
R
S
Q
5.0Vref
+
+
+
C
tSoft–Start  3600C in µF
1.0M
1.0mA
5(9)
R
R
Bias
Osc
8(14)
4(7)
2(3)
1(1)
2R
R
EA
+
+
Q1
RS
3(5)
5(8)
1.0V
R
S
Q
Comp/Latch
5.0Vref
VClamp
Vin
VCC
7(11)
6(10)
+
+
+
+
7(12)
+
MPSA63
R1
R2
C
tSoftstart = – In
1 –
VC
R1 R2
C
R2
VClamp =
1.67
+ 1
Ipk(max) = VClamp
RS
Where: 0
≤ VClamp ≤ 1.0 V
1.0mA
R1
3VClamp
R1 + R2
RS
1/4 W
(5)
(8)
R
S
Q
Comp/Latch
5.0Vref
Vin
VCC
(11)
(10)
+
+
+
+
(12)
+
Power Ground
To Input Source
Return
VPin 5 =
If: SENSEFET = MTP10N10M
RS = 200
Then: Vpin 5 = 0.075 Ipk
SENSEFET
RS Ipk rDS(on)
M
G
D
S
K
Control CIrcuitry
Ground:
To Pin (9)
rDM(on) + RS


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