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DS42587 데이터시트(HTML) 19 Page - Advanced Micro Devices

부품명 DS42587
상세내용  Stacked Multi-Chip Package (MCP) Flash Memory and SRAM
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제조사  AMD [Advanced Micro Devices]
홈페이지  http://www.amd.com
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DS42587 데이터시트(HTML) 19 Page - Advanced Micro Devices

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DS42587
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SecSi (Secured Silicon) Sector Flash
Memory Region
The SecSi (Secured Silicon) Sector feature provides a
Flash memory region that enables permanent part
identification through an Electronic Serial Number
(ESN). The SecSi Sector is 64 Kbytes in length, and
uses a SecSi Sector Indicator Bit to indicate whether
or not the SecSi Sector is locked when shipped from
the factory. This bit is permanently set at the factory
and cannot be changed, which prevents cloning of a
factory locked part. This ensures the security of the
ESN once the product is shipped to the field.
AMD offers the device with the SecSi Sector either
fac tor y lock ed or customer lock able. T he fac -
tory-locked version is always protected when shipped
from the factory, and has the SecSi Sector Indicator
Bit permanently set to a “1.” The customer-lockable
version is shipped with the unprotected, allowing cus-
tomers to utilize the that sector in any manner they
choose. The customer-lockable version has the SecSi
Sector Indicator Bit permanently set to a “0.” Thus, the
SecSi Sector Indicator Bit prevents customer-lockable
devices from being used to replace devices that are
factory locked.
The system accesses the SecSi Sector through a
command sequence (see “Enter SecSi Sector/Exit
SecSi Sector Command Sequence”). After the system
has written the Enter SecSi Sector command se-
quence, it may read the SecSi Sector by using the
addresses normally occupied by the boot sectors. This
mode of operation continues until the system issues
the Exit SecSi Sector command sequence, or until
power is removed from the device. On power-up, or
following a hardware reset, the device reverts to send-
ing commands to the boot sectors.
Factory Locked: SecSi Sector Programmed and
Protected At the Factory
In a factory locked device, the SecSi Sector is pro-
tected when the device is shipped from the factory.
The SecSi Sector cannot be modified in any way. The
device is available preprogrammed with a random, se-
cure ESN only
In devices that have an ESN, the Top Boot starting ad-
dress of the ESN will be at the bottom of the lowest 8
Kbyte boot sector at addresses 1F8000h–1F8007h in
word mode (or addresses 3F0000h–3F000Fh in byte
mode).
Customer Lockable: SecSi Sector NOT
Programmed or Protected At the Factory
If the security feature is not required, the SecSi Sector
can be treated as an additional Flash memory space,
expanding the size of the available Flash array by 64
Kbytes. The SecSi Sector can be read, programmed,
and erased as often as required. Note that the acceler-
ated programming (ACC) and unlock bypass functions
are not available when programming the SecSi Sector.
The SecSi Sector area can be protected using one of the
following procedures:
s Write the three-cycle Enter SecSi Sector Region
command sequence, and then follow the in-system
sector protect algorithm as shown in Figure 2, ex-
cept that RESET# may be at either V
IH or VID. This
allows in-system protection of the without raising
any device pin to a high voltage. Note that this
method is only applicable to the SecSi Sector.
s Write the three-cycle Enter SecSi Sector Region
command sequence, and then use the alternate
method of sector protection described in the “Sec-
tor/Sector Block Protection and Unprotection”.
Once the SecSi Sector is locked and verified, the sys-
t e m m u st w r it e t h e Ex it Se cSi Se ct or R e g i o n
command sequence to return to reading and writing
the remainder of the array.
The SecSi Sector protection must be used with cau-
tion since, once protected, there is no procedure
available for unprotecting the SecSi Sector area and
none of the bits in the SecSi Sector memory space
can be modified in any way.
Hardware Data Protection
The command sequence requirement of unlock cycles
for programming or erasing provides data protection
against inadvertent writes (refer to Table 12 for com-
mand definitions). In addition, the following hardware
data protection measures prevent accidental erasure
or programming, which might otherwise be caused by
spurious system level signals during V
CC power-up
and power-down transitions, or from system noise.
Low VCC Write Inhibit
When VCC is less than VLKO, the device does not ac-
cept any write cycles. This protects data during VCC
power-up and power-down. The command register
and all internal program/erase circuits are disabled,
and the device resets to reading array data. Subse-
quent writes are ignored until VCC is greater than VLKO.
The system must provide the proper signals to the
control pins to prevent unintentional writes when VCC
is greater than VLKO.
Write Pulse “Glitch” Protection
Noise pulses of less than 5 ns (typical) on OE#, CE#f
or WE# do not initiate a write cycle.
Logical Inhibit
Write cycles are inhibited by holding any one of OE# =
V
IL, CE#f = VIH or WE# = VIH. To initiate a write cycle,


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