전자부품 데이터시트 검색엔진 |
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DS42587 데이터시트(PDF) 3 Page - Advanced Micro Devices |
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DS42587 데이터시트(HTML) 3 Page - Advanced Micro Devices |
3 / 58 page DS42587 3 TABLE OF CONTENTS Distinctive Characteristics . . . . . . . . . . . . . . . . . . 1 MCP Features . . . . . . . . . . . . . . . . . . . . . . . . . . . . 1 Flash Memory Features . . . . . . . . . . . . . . . . . . . . . 1 Architectural Advantages . . . . . . . . . . . . . . . . . . . 1 Performance Characteristics . . . . . . . . . . . . . . . . 1 Software Features . . . . . . . . . . . . . . . . . . . . . . . . 1 Hardware Features . . . . . . . . . . . . . . . . . . . . . . . 1 SRAM Features . . . . . . . . . . . . . . . . . . . . . . . . . . . 1 General Description . . . . . . . . . . . . . . . . . . . . . . . . 2 Am29DL323 Features . . . . . . . . . . . . . . . . . . . . . . 2 Simultaneous Read/Write Operations with Zero Latency . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 2 Product Selector Guide . . . . . . . . . . . . . . . . . . . . . 5 MCP Block Diagram . . . . . . . . . . . . . . . . . . . . . . . . 5 Flash Memory Block Diagram. . . . . . . . . . . . . . . . 6 Connection Diagram . . . . . . . . . . . . . . . . . . . . . . . 7 Special Handling Instructions for FBGA Package . 7 Pin Description. . . . . . . . . . . . . . . . . . . . . . . . . . . . 8 Logic Symbol . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 8 Ordering Information . . . . . . . . . . . . . . . . . . . . . . . 8 Device Bus Operations . . . . . . . . . . . . . . . . . . . . . 8 Table 1. Device Bus Operations—Flash Word Mode, CIOf = V IH; SRAM Word Mode, CIOs = V CC . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 9 Table 2. Device Bus Operations—Flash Word Mode, CIOf = V IH; SRAM Byte Mode, CIOs = V SS . . . . . . . . . . . . . . . . . . . . . . . . . . . . 10 Table 3. Device Bus Operations—Flash Byte Mode, CIOf = V IL; SRAM Byte Mode, CIOs = V SS . . . . . . . . . . . . . . . . . . . . . . . . . . . . 11 Word/Byte Configuration . . . . . . . . . . . . . . . . . . . 12 Requirements for Reading Array Data . . . . . . . . . 12 Writing Commands/Command Sequences . . . . . 12 Accelerated Program Operation . . . . . . . . . . . . 12 Autoselect Functions . . . . . . . . . . . . . . . . . . . . . 12 Simultaneous Read/Write Operations with Zero Latency . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 12 Standby Mode . . . . . . . . . . . . . . . . . . . . . . . . . . . 13 Automatic Sleep Mode . . . . . . . . . . . . . . . . . . . . . 13 RESET#: Hardware Reset Pin . . . . . . . . . . . . . . . 13 Output Disable Mode . . . . . . . . . . . . . . . . . . . . . . 13 Table 4. Device Bank Division . . . . . . . . . . . . . . 13 Table 5. Sector Addresses for Top Boot Sector Devices . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 14 Table 6. SecSi Sector Addresses for Top Boot Devices . . . . . . . . . . . . . . . . . . . . . . . . . . . 15 Autoselect Mode . . . . . . . . . . . . . . . . . . . . . . . . . 16 Sector/Sector Block Protection and Unprotection 16 Table 7. Top Boot Sector/Sector Block Addresses for Protection/Unprotection . . . . . . . 16 Write Protect (WP#) . . . . . . . . . . . . . . . . . . . . . . . 16 Temporary Sector/Sector Block Unprotect . . . . . . 17 Figure 1. Temporary Sector Unprotect Operation . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 17 Figure 2. In-System Sector/Sector Block Protect and Unprotect Algorithms . . . . . . . . . . . 18 SecSi (Secured Silicon) Sector Flash Memory Region . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 19 Factory Locked: SecSi Sector Programmed and Protected At the Factory . . . . . . . . . . . . . . . . . . 19 Customer Lockable: SecSi Sector NOT Programmed or Protected At the Factory . . . . . 19 Hardware Data Protection . . . . . . . . . . . . . . . . . . 19 Low V CC Write Inhibit . . . . . . . . . . . . . . . . . . . . 19 Write Pulse “Glitch” Protection . . . . . . . . . . . . . 19 Logical Inhibit . . . . . . . . . . . . . . . . . . . . . . . . . . 19 Power-Up Write Inhibit . . . . . . . . . . . . . . . . . . . 20 Common Flash Memory Interface (CFI) . . . . . . . 20 Table 8. CFI Query Identification String . . . . . . 20 Table 9. System Interface String . . . . . . . . . . . 21 Table 10. Device Geometry Definition . . . . . . . 21 Table 11. Primary Vendor-Specific Extended Query . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 22 Command Definitions. . . . . . . . . . . . . . . . . . . . . . 23 Reading Array Data . . . . . . . . . . . . . . . . . . . . . . . 23 Reset Command . . . . . . . . . . . . . . . . . . . . . . . . . 23 Autoselect Command Sequence . . . . . . . . . . . . . 23 Enter SecSi Sector/Exit SecSi Sector Command Sequence . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 24 Byte/Word Program Command Sequence . . . . . 24 Unlock Bypass Command Sequence . . . . . . . . 24 Figure 3. Program Operation . . . . . . . . . . . . . . . 25 Chip Erase Command Sequence . . . . . . . . . . . . 25 Sector Erase Command Sequence . . . . . . . . . . . 25 Erase Suspend/Erase Resume Commands . . . . 26 Figure 4. Erase Operation . . . . . . . . . . . . . . . . . 26 Table 12. DS42587 Command Definitions . . . . 27 Write Operation Status . . . . . . . . . . . . . . . . . . . . . 28 DQ7: Data# Polling . . . . . . . . . . . . . . . . . . . . . . . 28 Figure 5. Data# Polling Algorithm . . . . . . . . . . . 28 RY/BY#: Ready/Busy# . . . . . . . . . . . . . . . . . . . . . 29 DQ6: Toggle Bit I . . . . . . . . . . . . . . . . . . . . . . . . . 29 Figure 6. Toggle Bit Algorithm . . . . . . . . . . . . . . 29 DQ2: Toggle Bit II . . . . . . . . . . . . . . . . . . . . . . . . 30 Reading Toggle Bits DQ6/DQ2 . . . . . . . . . . . . . . 30 DQ5: Exceeded Timing Limits . . . . . . . . . . . . . . . 30 DQ3: Sector Erase Timer . . . . . . . . . . . . . . . . . . 30 Table 13. Write Operation Status . . . . . . . . . . . 31 Absolute Maximum Ratings. . . . . . . . . . . . . . . . . 32 Operating Ranges . . . . . . . . . . . . . . . . . . . . . . . . . 32 Industrial (I) Devices . . . . . . . . . . . . . . . . . . . . . 32 V CCf/VCCs Supply Voltage . . . . . . . . . . . . . . . . . 32 DC Characteristics . . . . . . . . . . . . . . . . . . . . . . . . 33 CMOS Compatible . . . . . . . . . . . . . . . . . . . . . . . 33 SRAM DC and Operating Characteristics. . . . . . 34 Zero-Power Flash . . . . . . . . . . . . . . . . . . . . . . . 35 Figure 9. I CC1 Current vs. Time (Showing Active and Automatic Sleep Currents) . . . . . . . . . . . . . 35 Figure 10. Typical I CC1 vs. Frequency . . . . . . . . 35 Test Conditions. . . . . . . . . . . . . . . . . . . . . . . . . . . 36 Figure 11. Test Setup . . . . . . . . . . . . . . . . . . . . 36 Table 14. Test Specifications . . . . . . . . . . . . . . 36 |
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