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DS42587 ๋ฐ์ดํ„ฐ์‹œํŠธ(HTML) 38 Page - Advanced Micro Devices

๋ถ€ํ’ˆ๋ช… DS42587
์ƒ์„ธ๋‚ด์šฉ  Stacked Multi-Chip Package (MCP) Flash Memory and SRAM
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์ œ์กฐ์‚ฌ  AMD [Advanced Micro Devices]
ํ™ˆํŽ˜์ด์ง€  http://www.amd.com
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DS42587 ๋ฐ์ดํ„ฐ์‹œํŠธ(HTML) 38 Page - Advanced Micro Devices

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DS42587
AC CHARACTERISTICS
Flash Read-Only Operations
Notes:
1. Not 100% tested.
2. See Figure 11 and Table 14 for test specifications.
Parameter
Description
Test Setup
85 ns Speed
Unit
JEDEC
Std
Min
Max
t
AVAV
t
RC
Read Cycle Time (Note 1)
85
ns
t
AVQV
t
ACC
Address to Output Delay
CE#f, OE# = V
IL
85
ns
t
ELQV
t
CE
Chip Enable to Output Delay
OE# = V
IL
85
ns
t
GLQV
t
OE
Output Enable to Output Delay
40
ns
t
EHQZ
t
DF
Chip Enable to Output High Z (Note 1)
16
ns
t
GHQZ
t
DF
Output Enable to Output High Z (Note 1)
16
ns
t
AXQX
t
OH
Output Hold Time From Addresses, CE#f or OE#,
Whichever Occurs First
0ns
t
OEH
Output Enable Hold Time
(Note 1)
Read
0
ns
Toggle and
Data# Polling
10
ns
tOH
tCE
Outputs
WE#
Addresses
CE#f
OE#
HIGH Z
Output Valid
HIGH Z
Addresses Stable
tRC
tACC
tOEH
tRH
tOE
tRH
0 V
RY/BY#
RESET#
tDF
Figure 14.
Read Operation Timings


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