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DS42587 데이터시트(PDF) 51 Page - Advanced Micro Devices |
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DS42587 데이터시트(HTML) 51 Page - Advanced Micro Devices |
51 / 58 page DS42587 51 AC CHARACTERISTICS Figure 29. SRAM Read Cycle Notes: 1. WE# = VIH, if CIOs is low, ignore UB#s/LB#s timing. 2. tHZ and tOHZ are defined as the time at which the outputs achieve the open circuit conditions and are not referenced to output voltage levels. 3. At any given temperature and voltage condition, tHZ (Max.) is less than tLZ (Min.) both for a given device and from device to device interconnection. Data Valid High-Z tRC CS#1 Address UB#, LB# OE# Data Out tOH tAA tCO1 tBA tOE tOLZ tBLZ tLZ tOHZ tBHZ tHZ CS2 tCO2 |
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