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BD9P1X5EFV-C 데이터시트(PDF) 22 Page - Rohm |
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BD9P1X5EFV-C 데이터시트(HTML) 22 Page - Rohm |
22 / 60 page 22/57 TSZ02201-0J1J0AL01480-1-2 © 2019 ROHM Co., Ltd. All rights reserved. 08.Apr.2020 Rev.002 www.rohm.com TSZ22111 • 15 • 001 BD9P1x5EFV-C Series Function Explanation - continued 6. Frequency Division Function This device drives the High Side FET with a bootstrap and requires the ON time of the Low Side FET to charge the BST pin. Therefore, the minimum OFF time of the SW pin is specified, and the output voltage is limited by the minimum OFF time under the condition in which the voltage between input and output are close. To prevent this situation, OFF pulses are skipped when the voltage between input and output are small to keep the High Side FET turned on and increase the ON duty of the SW pin. The OFF pulse skip is done for 7 consecutive switching cycles in maximum (The switching frequency becomes a one eighth of nominal frequency). In this case, the output voltage can be calculated with the following equation. ���������������� = ���������������������������� × (������������ − ���������������� × ����������������) − ������������ × ���������������� = (1 − ���������������������������� × ������������ 8 ) × (������������ − ���������������� × ����������������) − ������������ × ���������������� [V] Where: ���������������������������� is the SW pin Maximum ON Duty Cycle [%] ������������ is the Input Voltage [V] ���������������� is the High Side FET ON Resistance [Ω] (Refer to page 11) ���������������� is the Output Current [A] ������������ is the DCR of Inductor [Ω] ���������������������������� is the SW pin Minimum OFF Time [s] (Refer to page 10) ������������ is the Switching Frequency [Hz] (Refer to page 11) VOUT VIN VSW Figure 36. Frequency Division Function |
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