 |
전자부품 데이터시트 검색엔진 |
|
|
전자부품 데이터시트 검색엔진 |
|
BM81810MUF-M 데이터시트(PDF) 29 Page - Rohm |
|
||||||||||||||||||||||||||||||
BM81810MUF-M 데이터시트(HTML) 29 Page - Rohm |
|
|
29 / 78 page  BM81810MUF-M . 29/75 TSZ02201-0A3A0AS00510-1-2 © 2020 ROHM Co., Ltd. All rights reserved. 15.May.2020 Rev.001 TSZ22111 • 15 • 001 www.rohm.com Application Example 2 (when operated with EN= VCC condition) Timing Chart2 Start-up Sequence (when operated with EN= VCC condition) VGL AVDD VGL VCOM VGH load SW ON VIN level AVDD level delay1 (0～300ms) AVDD VREG VDD 90% Discharge 0～5ms EEROM Discharge 1ms (when VDD=1.2V) VDD EEPROM Auto Read VIN, VINB, EN The order of starting VDD can be changed by the register setting. EEPROM Register Data write-able zone Soft Start time 5ms (when 10.5V is set) Soft Start time 5ms (when -6V is set) Vcc UVLO release Vcc=2.55V (Inner logic, reset EEPROM) Soft Start time 5ms (when 18V is set) GSOUT delay4 (0～40ms) RST PG delay2 (0～40ms) delay3 (0～40ms) FAULT Reset monitor is setting VDD. |
|
Korean ▼
English
Chinese
German
Japanese
Russian
Korean
Spanish
French
Italian
Portuguese
Polish
Vietnamese
