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BM81810MUF-M 데이터시트(PDF) 48 Page - Rohm |
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BM81810MUF-M 데이터시트(HTML) 48 Page - Rohm |
48 / 78 page ![]() BM81810MUF-M . 48/75 TSZ02201-0A3A0AS00510-1-2 © 2020 ROHM Co., Ltd. All rights reserved. 15.May.2020 Rev.001 TSZ22111 • 15 • 001 www.rohm.com <00> <01> <10> <11> <00> <01> <10> <11> AVDD Block Function ERRAMP PWM DAC REGISTER LOAD SWITCH DRIVER VIN VLSO PAVDD PGND SW DISCHARGE AVDD Block (Boost DC / DC) can set the following functions by EEPROM. 1. AVDD Voltage (Register Address 00h [7:0]) AVDD voltage can be set in 0.1V step from 5.0V to 17.0V. 2. SW Switching Frequency (Register Address 0Ch [1:0]) The switching frequency can be set at 525KHz, 1.05MHz or 2.1MHz. 3. Soft Start Time (Register Address 0Bh [5:4]) Soft Start Time of AVDD can be set in 5ms step from 5ms to 20ms. 4. SW Switching Slew Rate (Register Address 0Bh [3:2]) SW pin switching Slew Rate can be controlled by the register setting. 11 ’b is the fastest slew rate setting, 00’b is the slowest slew rate setting. The slew rate by each setting is as follows. Slew Rate changes by the external part and load electric current conditions such as a coil or the diode, but adjustment is possible on a true set condition because Slew Rate changes by Slew Rate setting change like Figure.79. The EMI properties are improved by slowing a slew rate, but please do enough evaluations after a slew rate change because efficiency becomes the tendency to decrease. Figure 78. AVDD Block Diagram Figure 79. AVDD Switching Slew Rate (VIN=3.3V, AVDD=10.5V, Freq=2.1MHz, L=4.7 μH, IAVDD=100mA) <xx>:AVDD Slew Rate setting |
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