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ICS722 ๋ฐ์ดํ„ฐ์‹œํŠธ(HTML) 3 Page - Integrated Circuit Systems

๋ถ€ํ’ˆ๋ช… ICS722
์ƒ์„ธ๋‚ด์šฉ  LOW COST 27 MHZ 3.3 VOLT VCXO
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์ œ์กฐ์‚ฌ  ICST [Integrated Circuit Systems]
ํ™ˆํŽ˜์ด์ง€  http://www.icst.com
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ICS722 ๋ฐ์ดํ„ฐ์‹œํŠธ(HTML) 3 Page - Integrated Circuit Systems

   
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LOW COST 27 MHZ 3.3 VOLT VCXO
MDS 722 A
3
Revision 121404
In te gr ated Circuit Systems โ— 525 Ra ce Street, San Jose, CA 9512 6 โ— tel (4 08) 297-1 201 โ— www.icst.com
ICS722
External Component Selection
The ICS722 requires a minimum number of external
components for proper operation.
Decoupling Capacitors
A decoupling capacitor of 0.01
ยตF should be connected
between VDD and GND on pins 2 and 4 as close to the
ICS722 as possible. For optimum device performance,
the decoupling capacitor should be mounted on the
component side of the PCB. Avoid the use of vias in the
decoupling circuit.
Series Termination Resistor
When the PCB trace between the clock output and the
load is over 1 inch, series termination should be used.
To series terminate a 50
โ„ฆ trace (a commonly used
trace impedance), place a 33
โ„ฆ resistor in series with
the clock line, as close to the clock output pin as
possible. The nominal impedance of the clock output is
20
โ„ฆ.
Quartz Crystal
The ICS722 VCXO function consists of the external
crystal and the integrated VCXO oscillator circuit. To
assure the best system performance (frequency pull
range) and reliability, a crystal device with the
recommended parameters (shown below) must be
used, and the layout guidelines discussed in the
following section shown must be followed.
The oscillation frequency of a quartz crystal is
determined by its โ€œcutโ€ and by the load capacitors
connected to it. The ICS722 incorporates on-chip
variable load capacitors that โ€œpullโ€ (change) the
frequency of the crystal. The crystal specified for use
with the ICS722 is designed to have zero frequency
error when the total of on-chip + stray capacitance is
14 pF.
Recommended Crystal Parameters:
Initial Accuracy at 25ยฐCยฑ20 ppm
Temperature Stability
ยฑ30 ppm
Aging
ยฑ20 ppm
Load Capacitance
14 pf
Shunt Capacitance, C0
7 pF Max
C0/C1 Ratio
250 Max
Equivalent Series Resistance
35
โ„ฆ Max
The external crystal must be connected as close to the
chip as possible and should be on the same side of the
PCB as the ICS722. There should be no viaโ€™s between
the crystal pins and the X1 and X2 device pins. There
should be no signal traces underneath or close to the
crystal. See application note MAN05.
Crystal Tuning Load Capacitors
The crystal traces should include pads for small fixed
capacitors, one between X1 and ground, and another
between X2 and ground. Stuffing of these capacitors
on the PCB is optional. The need for these capacitors is
determined at system prototype evaluation, and is
influenced by the particular crystal used (manufacture
and frequency) and by PCB layout. The typical required
capacitor value is 1 to 4 pF.
The procedure for determining the value of these
capacitors can be found in application note MAN05.


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