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LH540203D-35 데이터시트(PDF) 4 Page - Sharp Corporation

부품명 LH540203D-35
상세설명  CMOS 2048X9 ASYNCHRONOUS FIFO
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제조업체  SHARP [Sharp Corporation]
홈페이지  http://sharp-world.com/
Logo SHARP - Sharp Corporation

LH540203D-35 데이터시트(HTML) 4 Page - Sharp Corporation

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OPERATIONAL DESCRIPTION (cont’d)
Retransmit
The FIFO can be made to reread previously-read data
by means of the Retransmit function. A retransmit opera-
tion is initiated by pulsing the RT input LOW. Both R and
W must be deasserted (HIGH) for the duration of the
retransmit pulse. The FIFO’s internal read-address
pointer is reset to point to location zero, the first physical
memory location, while the internal write-address
pointer remains unchanged.
After a retransmit operation, those data words in the
region in between the read-address pointer and the
write-address pointer may be reaccessed by subsequent
read operations. A retransmit operation may affect the
state of the status flags FF, HF, and EF, depending on
the relocation of the read-address pointer. There is no
restriction on the number of times that a block of data
within an LH540203 may be read out, by repeating the
retransmit operation and the subsequent read operations.
The maximum length of a data block which may be
retransmitted is 2048 words. Note that if the write-address
pointer ever ‘wraps around’ (i.e., passes location zero
more than once) during a sequence of retransmit opera-
tions, some data words will be lost.
The Retransmit function is not available when the
LH540203 is operating in depth-cascaded mode,
because the FL/RT control pin must be used for first-load
selection rather than for retransmission control.
Table 1. Grouping-Mode Determination
During a Reset Operation
XI
FL/
RT
MODE
XO/HF
USAGE
XI
USAGE
FL/RT
USAGE
H 1
H
Cascaded
Slave
2
XO
XI
FL
H 1
L
Cascaded
Master
2
XO
XI
FL
L
X
Standalone
HF
(none)
RT
NOTES:
1. A reset operation forces XO HIGH for the nth FIFO, thus forcing
XI HIGH for the (n+1)st FIFO.
2. The terms ‘master’ and ‘slave’ refer to operation in depth-cas-
caded grouping mode.
3. H = HIGH; L = LOW; X = Don’t Care.
Table 2. Expansion-Pin Usage According to
Grouping Mode
I/O
PIN
STANDALONE
CASCADED
MASTER
CASCADED
SLAVE
I
XI
Grounded
From XO
(n-1st
FIFO)
From XO
(n-1st
FIFO)
O
XO/HF
Becomes
HF
To XI
(n+1st
FIFO)
To XI
(n+1st
FIFO)
I
FL/RT
Becomes
RT
Grounded
(Logic
LOW)
Logic
HIGH
Table 3. Status Flags
NUMBER OF UNREAD DATA
WORDS PRESENT WITHIN
2048
× 9 FIFO
FF
HF
EF
0H
H
L
1 to 1024
H
H
H
1025 to 2047
H
L
H
2048
L
L
H
LH540203
CMOS 2048
× 9 Asynchronous FIFO
4


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