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TH58NS100DC ๋ฐ์ดํ„ฐ์‹œํŠธ(HTML) 28 Page - Toshiba Semiconductor

๋ถ€ํ’ˆ๋ช… TH58NS100DC
์ƒ์„ธ๋‚ด์šฉ  TOSHIBA MOS DIGITAL INTEGRATED CIRCUIT SILICON GATE CMOS 1 - GBIT (128M X 8 BITS) CMOS NAND E2PROM ( 128M BYTE SmartMediaTM )
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TH58NS100DC ๋ฐ์ดํ„ฐ์‹œํŠธ(HTML) 28 Page - Toshiba Semiconductor

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TH58NS100DC
2001-03-21
28/43
Starting the above operation from 1st page of the selected erase blocks, and then repeating the operation total
31 times with incrementing the page address in the blocks, and then input the last page data of the blocks,
โ€œ10Hโ€ command executes final programming.
In this full sequence, the command sequence is following.
After the โ€œ10Hโ€ command, the total results of the above operation is shown through the Status Read
command.
The Status discription is following.
STATUS
OUTPUT
I/O1
Total Pass/Fail
Pass: 0
Fail: 1
I/O2
District 0
Pass/Fail
Pass: 0
Fail: 1
I/O3
District 1
Pass/Fail
Pass: 0
Fail: 1
I/O4
District 2
Pass/Fail
Pass: 0
Fail: 1
I/O5
District 3
Pass/Fail
Pass: 0
Fail: 1
I/O6
Not Used
Do not care
I/O7
Ready/Busy
Ready: 1
Busy: 0
I/O8
Write Protect
Protect: 0
Not Protect: 1
I/O1 describes total Pass/Fail condition.
If at least one fail occurred in 32 times
ยด 4
(512
+ 16 byte) page write operation, it
shows โ€œFailโ€ condition.
I/O2 describes total Pass/Fail condition.
If more than one fail occurred in 32 times
ยด 1 (512 + 16 byte) page write operation in
District 0 area, it shows โ€œFailโ€ condition.
I/O3, I/O4 and I/O5 are as same
manner as I/O2.
10
71
Pass
I/O
Status Read
command
Fail
BY
/
RY
15
15
80
15
10
80
80
80
11
11
11
11
80
80
80
80
11
11
11
11
80
80
80
80
11
11
11
11
80
80
80
80
1st
31st
32nd


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