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AM50DL128CG 데이터시트(HTML) 46 Page - SPANSION

부품명 AM50DL128CG
상세내용  Stacked Multi-Chip Package (MCP) Flash Memory and SRAM
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제조사  SPANSION [SPANSION]
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AM50DL128CG 데이터시트(HTML) 46 Page - SPANSION

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November 7, 2002
Am50DL128CG
45
P R E L I M I NARY
FLASH AC CHARACTERISTICS
OE#
CE#f
Addresses
VCCf
WE#
Data
2AAh
SADD
tGHWL
tAH
tWP
tWC
tAS
tWPH
555h for chip erase
10 for Chip Erase
30h
tDS
tVCS
tCS
tDH
55h
tCH
In
Progress
Complete
tWHWH2
VA
VA
Erase Command Sequence (last two cycles)
Read Status Data
RY/BY#
tRB
tBUSY
Notes:
1. SADD = sector address (for Sector Erase), VA = Valid Address for reading status data (see “Flash Write Operation Status”.
2. These waveforms are for the word mode.
3. CE#f refers to active flash device being addressed (either CE#f1 or CE#f2). The chip enable input of the inactive flash device must
be held high during this operation.
Figure 19.
Chip/Sector Erase Operation Timings


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