 |
전자부품 데이터시트 검색엔진 |
|
|
전자부품 데이터시트 검색엔진 |
|
AM50DL128CG 데이터시트(HTML) 5 Page - SPANSION |
|
||||||||||||||||||||||||||||||
AM50DL128CG 데이터시트(HTML) 5 Page - SPANSION |
|
|
5 / 63 page 
4 Am50DL128CG November 7, 2002 P R E L I M I NARY pSRAM Data Retention . . . . . . . . . . . . . . . . . . . . . 58 pSRAM Power on and Deep Power Down . . . . . 58 Figure 32. Deep Power-down Timing.............................................. 58 Figure 33. Power-on Timing............................................................ 58 pSRAM Address Skew . . . . . . . . . . . . . . . . . . . . . 59 Figure 34. Read Address Skew ...................................................... 59 Figure 35. Write Address Skew...................................................... 59 Physical Dimensions . . . . . . . . . . . . . . . . . . . . . . 60 FTA088—88-Ball Fine-Pitch Grid Array 11.6 x 8 mm ............. 60 Revision Summary . . . . . . . . . . . . . . . . . . . . . . . . 61 |
Korean ▼ 
English
Chinese
German
Japanese
Russian
Spanish
French
Italian
Portuguese
Polish
Vietnamese
