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AM50DL128CG 데이터시트(HTML) 25 Page - SPANSION

부품명 AM50DL128CG
상세내용  Stacked Multi-Chip Package (MCP) Flash Memory and SRAM
Download  63 Pages
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제조사  SPANSION [SPANSION]
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AM50DL128CG 데이터시트(HTML) 25 Page - SPANSION

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Am50DL128CG
November 7, 2002
P R E L I M I NARY
Table 9.
Device Geometry Definition
Addresses
(Word Mode)
Data
Description
27h
0017h
Device Size = 2
N byte
28h
29h
0002h
0000h
Flash Device Interface description (refer to CFI publication 100)
2Ah
2Bh
0000h
0000h
Max. number of byte in multi-byte write = 2
N
(00h = not supported)
2Ch
0003h
Number of Erase Block Regions within device
2Dh
2Eh
2Fh
30h
0007h
0000h
0020h
0000h
Erase Block Region 1 Information
(refer to the CFI specification or CFI publication 100)
31h
32h
33h
34h
007Dh
0000h
0000h
0001h
Erase Block Region 2 Information
(refer to the CFI specification or CFI publication 100)
35h
36h
37h
38h
0007h
0000h
0020h
0000h
Erase Block Region 3 Information
(refer to the CFI specification or CFI publication 100)
39h
3Ah
3Bh
3Ch
0000h
0000h
0000h
0000h
Erase Block Region 4 Information
(refer to the CFI specification or CFI publication 100)


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