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74LVX03 데이터시트(PDF) 4 Page - STMicroelectronics

부품명 74LVX03
부품 상세설명  LOW VOLTAGE CMOS QUAD 2-INPUT NAND GATE (OPEN DRAIN) WITH 5V TOLERANT INPUTS
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제조업체  STMICROELECTRONICS [STMicroelectronics]
홈페이지  http://www.st.com
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74LVX03 데이터시트(HTML) 4 Page - STMicroelectronics

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AC ELECTRICAL CHARACTERISTICS (Input tr = tf = 3ns)
1) Skew is defined as the absolute value of the difference between the actual propagation delay for any two outputs of the same device switch-
ing in the same direction, either HIGH or LOW
2) Parameter guaranteed by design
(*) Voltage range is 3.3V
± 0.3V
CAPACITIVE CHARACTERISTICS
1) CPD is defined as the value of the IC’s internal equivalent capacitance which is calculated from the operating current consumption without
load. (Refer to Test Circuit). Average operating current can be obtained by the following equation. ICC(opr) = CPD x VCC x fIN + ICC/6 (per gate)
Symbol
Parameter
Test Condition
Value
Unit
VCC
(V)
CL
(pF)
TA = 25°C
-40 to 85°C
-55 to 125°C
Min.
Typ.
Max.
Min.
Max.
Min.
Max.
tPZL
Propagation Delay
Time
2.7
15
5.4
7.7
9.0
9.5
ns
2.7
50
6.0
8.7
10.0
11.0
3.3(*)
15
4.8
7.0
8.1
8.5
3.3(*)
50
5.3
7.6
8.8
9.5
tPLZ
Propagation Delay
Time
2.7
50
10.5
14.7
1.0
15.0
1.0
17.0
ns
3.3(*)
50
9.6
13.5
1.0
14.0
1.0
15.0
tOSLH
tOSHL
Output To Output
Skew Time (note1,
2)
2.7
50
0.5
1.0
1.5
1.5
ns
3.3(*)
50
0.5
1.0
1.5
1.5
Symbol
Parameter
Test Condition
Value
Unit
VCC
(V)
TA = 25°C
-40 to 85°C
-55 to 125°C
Min.
Typ.
Max.
Min.
Max.
Min.
Max.
CIN
Input Capacitance
3.3
5.4
10
10
10
pF
COUT
Output
Capacitance
3.3
7.3
pF
CPD
Power Dissipation
Capacitance
(note 1)
3.3
2.6
pF


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