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Z8F3221PM020EC 데이터시트(PDF) 92 Page - Zilog, Inc. |
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Z8F3221PM020EC 데이터시트(HTML) 92 Page - Zilog, Inc. |
92 / 299 page PS019915-1005 Interrupt Controller Z8 Encore!® 64K Series Product Specification 72 T3ENH—Timer 3 Interrupt Request Enable High Bit U1RENH—UART 1 Receive Interrupt Request Enable High Bit U1TENH—UART 1 Transmit Interrupt Request Enable High Bit DMAENH—DMA Interrupt Request Enable High Bit C3ENH—Port C3 Interrupt Request Enable High Bit C2ENH—Port C2 Interrupt Request Enable High Bit C1ENH—Port C1 Interrupt Request Enable High Bit C0ENH—Port C0 Interrupt Request Enable High Bit T3ENL—Timer 3 Interrupt Request Enable Low Bit U1RENL—UART 1 Receive Interrupt Request Enable Low Bit U1TENL—UART 1 Transmit Interrupt Request Enable Low Bit DMAENL—DMA Interrupt Request Enable Low Bit C3ENL—Port C3 Interrupt Request Enable Low Bit C2ENL—Port C2 Interrupt Request Enable Low Bit C1ENL—Port C1 Interrupt Request Enable Low Bit C0ENL—Port C0 Interrupt Request Enable Low Bit Interrupt Edge Select Register The Interrupt Edge Select (IRQES) register (Table 36) determines whether an interrupt is generated for the rising edge or falling edge on the selected GPIO Port input pin. The Table 34. IRQ2 Enable High Bit Register (IRQ2ENH) BITS 7 6 5 4 3 2 1 0 FIELD T3ENH U1RENH U1TENH DMAENH C3ENH C2ENH C1ENH C0ENH RESET 0 R/W R/W ADDR FC7H Table 35. IRQ2 Enable Low Bit Register (IRQ2ENL) BITS 7 6 5 4 3 2 1 0 FIELD T3ENL U1RENL U1TENL DMAENL C3ENL C2ENL C1ENL C0ENL RESET 0 R/W R/W ADDR FC8H |
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