GS880E36AT-200I datasheet(10/24 Pages) GSI

부품명	GS880E36AT-200I

상세설명	512K x 18, 256K x 32, 256K x 36 9Mb Synchronous Burst SRAMs

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제조업체	GSI [GSI Technology]

홈페이지	http://www.gsitechnology.com

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10 / 24 page

GS880E18/32/36AT-250/225/200/166/150/133

Specifications cited are subject to change without notice. For latest documentation see http://www.gsitechnology.com.

Rev: 1.03 11/2004

10/24

Simplified State Diagram

First Write

First Read

Burst Write

Burst Read

Deselect

R

W

CR

CW

X

WR

R

WR

X

CR

R

CW

CR

Notes:

1. The diagram shows only supported (tested) synchronous state transitions. The diagram presumes G is tied low.

2. The upper portion of the diagram assumes active use of only the Enable (E1) and Write (BA, BB, BC, BD, BW, and GW) control inputs, and

that ADSP is tied high and ADSC is tied low.

3. The upper and lower portions of the diagram together assume active use of only the Enable, Write, and ADSC control inputs, and

assumes ADSP is tied high and ADV is tied low.

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