전자부품 데이터시트 검색엔진
  Korean  ▼
ALLDATASHEET.CO.KR

X  

GS8170DW36C-300 데이터시트(PDF) 9 Page - GSI Technology

부품명 GS8170DW36C-300
상세설명  18Mb 誇1x1Dp CMOS I/O Double Late Write SigmaRAM
Download  27 Pages
Scroll/Zoom Zoom In 100%  Zoom Out
제조업체  GSI [GSI Technology]
홈페이지  http://www.gsitechnology.com
Logo GSI - GSI Technology

GS8170DW36C-300 데이터시트(HTML) 9 Page - GSI Technology

Back Button GS8170DW36C-300 Datasheet HTML 5Page - GSI Technology GS8170DW36C-300 Datasheet HTML 6Page - GSI Technology GS8170DW36C-300 Datasheet HTML 7Page - GSI Technology GS8170DW36C-300 Datasheet HTML 8Page - GSI Technology GS8170DW36C-300 Datasheet HTML 9Page - GSI Technology GS8170DW36C-300 Datasheet HTML 10Page - GSI Technology GS8170DW36C-300 Datasheet HTML 11Page - GSI Technology GS8170DW36C-300 Datasheet HTML 12Page - GSI Technology GS8170DW36C-300 Datasheet HTML 13Page - GSI Technology Next Button
Zoom Inzoom in Zoom Outzoom out
 9 / 27 page
background image
GS8170DW36/72C-333/300/250/200
Specifications cited are subject to change without notice. For latest documentation see http://www.gsitechnology.com.
Rev: 2.04 5/2005
9/27
© 2002, GSI Technology, Inc.
Burst Order
The burst address counter wraps around to its initial state after four internal addresses (the loaded address and three more) have
been accessed. SigmaRAMs always count in linear burst order.
Linear Burst Order
A[1:0]
1st address
00
01
10
11
2nd address
01
10
11
00
3rd address
10
11
00
01
4th address
11
00
01
10
Note:
The burst counter wraps to initial state on the 5th rising edge of clock.
Echo Clock
ΣRAMs feature Echo Clocks, CQ1, CQ2, CQ1, and CQ2 that track the performance of the output drivers. The Echo Clocks are
delayed copies of the main RAM clock, CK. Echo Clocks are designed to track changes in output driver delays due to variance in
die temperature and supply voltage. The Echo Clocks are designed to fire with the rest of the data output drivers. SigmaRAMs
provide both in-phase, or true, Echo Clock outputs (CQ1 and CQ2) and inverted Echo Clock outputs (CQ1 and CQ2).
It should be noted that deselection of the RAM via E2 and E3 also deselects the Echo Clock output drivers. The deselection of
Echo Clock drivers is always pipelined to the same degree as output data. Deselection of the RAM via E1 does not deactivate the
Echo Clocks.
Programmable Enables
ΣRAMs feature two user-programmable chip enable inputs, E2 and E3. The sense of the inputs, whether they function as active
low or active high inputs, is determined by the state of the programming inputs, EP2 and EP3. For example, if EP2 is held at VDD,
E2 functions as an active high enable. If EP2 is held to VSS, E2 functions as an active low chip enable input.
Programmability of E2 and E3 allows four banks of depth expansion to be accomplished with no additional logic. By programming
the enable inputs of four SRAMs in binary sequence (00, 01, 10, 11) and driving the enable inputs with two address inputs, four
SRAMs can be made to look like one larger RAM to the system.


유사한 부품 번호 - GS8170DW36C-300

제조업체부품명데이터시트상세설명
logo
GSI Technology
GS8170DW36AC GSI-GS8170DW36AC Datasheet
1,004Kb / 32P
   18Mb 誇1x1Dp CMOS I/O Double Late Write SigmaRAM
GS8170DW36AC-250 GSI-GS8170DW36AC-250 Datasheet
1,004Kb / 32P
   18Mb 誇1x1Dp CMOS I/O Double Late Write SigmaRAM
GS8170DW36AC-250I GSI-GS8170DW36AC-250I Datasheet
1,004Kb / 32P
   18Mb 誇1x1Dp CMOS I/O Double Late Write SigmaRAM
GS8170DW36AC-300 GSI-GS8170DW36AC-300 Datasheet
1,004Kb / 32P
   18Mb 誇1x1Dp CMOS I/O Double Late Write SigmaRAM
GS8170DW36AC-300I GSI-GS8170DW36AC-300I Datasheet
1,004Kb / 32P
   18Mb 誇1x1Dp CMOS I/O Double Late Write SigmaRAM
More results

유사한 설명 - GS8170DW36C-300

제조업체부품명데이터시트상세설명
logo
GSI Technology
GS8170DW36AC GSI-GS8170DW36AC Datasheet
1,004Kb / 32P
   18Mb 誇1x1Dp CMOS I/O Double Late Write SigmaRAM
GS8171DW36AC GSI-GS8171DW36AC Datasheet
1,007Kb / 33P
   18Mb 誇1x1Dp HSTL I/O Double Late Write SigmaRAM
GS8170LW36AC GSI-GS8170LW36AC Datasheet
999Kb / 32P
   18Mb 誇1x1Lp CMOS I/O Late Write SigmaRAM
GS8330LW36C GSI-GS8330LW36C Datasheet
579Kb / 30P
   36Mb 誇1x1Lp CMOS I/O Late Write SigmaRAM
GS8170LW36 GSI-GS8170LW36 Datasheet
884Kb / 27P
   18Mb sigma 1x1Lp CMOS I/O Late Write SigmaRAM
GS8170DD36C GSI-GS8170DD36C Datasheet
716Kb / 29P
   18Mb 誇1x2Lp CMOS I/O Double Data Rate SigmaRAM
GS8330DW36 GSI-GS8330DW36 Datasheet
583Kb / 30P
   Double Late Write SigmaRAM
logo
Motorola, Inc
MCM69L738A MOTOROLA-MCM69L738A Datasheet
212Kb / 20P
   4M Late Write 2.5 V I/O
MCM69R738C MOTOROLA-MCM69R738C Datasheet
511Kb / 20P
   4M Late Write 2.5 V I/O
MCM69R738A MOTOROLA-MCM69R738A Datasheet
213Kb / 20P
   4M Late Write 2.5 V I/O
More results


Html Pages

1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27


데이터시트 다운로드

Go To PDF Page


링크 URL




개인정보취급방침
ALLDATASHEET.CO.KR
ALLDATASHEET 가 귀하에 도움이 되셨나요?  [ DONATE ] 

Alldatasheet는?   |   광고문의   |   운영자에게 연락하기   |   개인정보취급방침   |   링크교환   |   제조사별 검색
All Rights Reserved©Alldatasheet.com


Mirror Sites
English : Alldatasheet.com  |   English : Alldatasheet.net  |   Chinese : Alldatasheetcn.com  |   German : Alldatasheetde.com  |   Japanese : Alldatasheet.jp
Russian : Alldatasheetru.com  |   Korean : Alldatasheet.co.kr  |   Spanish : Alldatasheet.es  |   French : Alldatasheet.fr  |   Italian : Alldatasheetit.com
Portuguese : Alldatasheetpt.com  |   Polish : Alldatasheet.pl  |   Vietnamese : Alldatasheet.vn
Indian : Alldatasheet.in  |   Mexican : Alldatasheet.com.mx  |   British : Alldatasheet.co.uk  |   New Zealand : Alldatasheet.co.nz
Family Site : ic2ic.com  |   icmetro.com