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전자부품 데이터시트 검색엔진 |
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AM42DL16X4D 데이터시트(HTML) 59 Page - SPANSION |
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AM42DL16X4D 데이터시트(HTML) 59 Page - SPANSION |
59 / 61 page ![]() 58 Am42DL16x4D January 9, 2002 P R E L IMINARY SRAM DATA RETENTION Notes: 1. CE1#s ≥ V CC – 0.2 V, CE2s ≥ VCC – 0.2 V (CE1#s controlled) or CE2s ≤ 0.2 V (CE2s controlled). 2. Typical values are not 100% tested. Figure 33. CE1#s Controlled Data Retention Mode Figure 34. CE2s Controlled Data Retention Mode Parameter Symbol Parameter Description Test Setup Min Typ Max Unit VDR VCC for Data Retention CS1#s ≥ V CC – 0.2 V (Note 1) 1.5 3.3 V I DR Data Retention Current VCC = 3.0 V, CE1#s ≥ VCC – 0.2 V (Note 1) 1.0 (Note 2) 10 µA t SDR Data Retention Set-Up Time See data retention waveforms 0ns t RDR Recovery Time t RC ns VDR VCC 2.7V 2.2V CE1#s GND Data Retention Mode CE1#s ≥ VCC - 0.2 V tSDR tRDR VCC 2.7 V 0.4 V VDR CE2s GND Data Retention Mode tSDR tRDR CE2s < 0.2 V |