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74AHC157PW 데이터시트(PDF) 2 Page - NXP Semiconductors

부품명 74AHC157PW
상세설명  Quad 2-input multiplexer
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제조업체  PHILIPS [NXP Semiconductors]
홈페이지  http://www.nxp.com
Logo PHILIPS - NXP Semiconductors

74AHC157PW 데이터시트(HTML) 2 Page - NXP Semiconductors

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1999 Sep 24
2
Philips Semiconductors
Product specification
Quad 2-input multiplexer
74AHC157;
74AHCT157
FEATURES
• ESD protection: HBM EIA/JESD22-A114-A
exceeds 2000 V MM EIA/JESD22-A115-A
exceeds 200 V CDM EIA/JESD22-C101
exceeds 1000 V
• Balanced propagation delays
• All inputs have Schmitt-trigger actions
• Multiple input enable for easy expansion
• Ideal for memory chip select decoding
• Inputs accept voltages higher than VCC
• For AHC only: operates with CMOS input levels
• For AHCT only: operates with TTL input levels
• Specified from −40 to +85 and +125 °C.
FUNCTION TABLE
See note 1.
Note
1. H = HIGH voltage level;
L = LOW voltage level;
X = don’t care.
DESCRIPTION
The 74AHC/AHCT157 are high-speed Si-gate CMOS
devices and are pin compatible with low power Schottky
TTL (LSTTL). They are specified in compliance with
JEDEC standard No. 7A.
The 74AHC/AHCT157 are quad 2-input multiplexers which
select 4 bits of data from two sources under the control of
a common data select input (S). The enable input (E) is
active LOW. When E is HIGH, all of the outputs (1Y to 4Y)
are forced LOW regardless of all other input conditions.
Moving the data from two groups of registers to four
common output buses is a common use of the ‘157’. The
state of the common data select input (S) determines the
particular register from which the data comes. It can also
be used as a function generator.
The device is useful for implementing highly irregular logic
by generating any four of the 16 different functions of two
variables with one variable common.
The ‘157’ is the logic implementation of a 4-pole, 2-position
switch, where the position of the switch is determine by the
logic levels applied to S.
The logic equations are:
1Y = E
× (1I1 × S+1I0 × S);
2Y = E
× (2I1 × S+2I0 × S);
3Y = E
× (3I1 × S+3I0 × S);
4Y = E
× (4I1 × S+4I0 × S).
The ‘157’ is identical to the ‘158’ but has non-inverting
(true) outputs.
INPUT
OUTPUT
ES
nI0
nI1
nY
H
XXX
L
LLL
X
L
LL
H
X
H
LH
X
L
L
L
HXH
H
ORDERING INFORMATION
OUTSIDE NORTH
AMERICA
NORTH AMERICA
PACKAGES
PINS
PACKAGE
MATERIAL
CODE
74AHC157D
74AHC157D
16
SO
plastic
SOT109-1
74AHC157PW
74AHC157PW DH
16
TSSOP
plastic
SOT403-1
74AHCT157D
74AHCT157D
16
SO
plastic
SOT109-1
74AHCT157PW
74AHCT157PW DH
16
TSSOP
plastic
SOT403-1


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