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ADF4217L 데이터시트(PDF) 1 Page - Analog Devices |
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ADF4217L 데이터시트(HTML) 1 Page - Analog Devices |
1 / 24 page a ADF4217L/ADF4218L/ADF4219L Information furnished by Analog Devices is believed to be accurate and reliable. However, no responsibility is assumed by Analog Devices for its use, nor for any infringements of patents or other rights of third parties that may result from its use. No license is granted by implication or otherwise under any patent or patent rights of Analog Devices. Trademarks and registered trademarks are the property of their respective companies. One Technology Way, P.O. Box 9106, Norwood, MA 02062-9106, U.S.A. Tel: 781/329-4700 www.analog.com Fax: 781/326-8703 © 2003 Analog Devices, Inc. All rights reserved. REV. C Dual Low Power Frequency Synthesizers FUNCTIONAL BLOCK DIAGRAM N = BP + A 11(13)-BIT IF B COUNTER 6(5)-BIT IF A COUNTER IF PRESCALER OUTPUT MUX IF LOCK DETECT CHARGE PUMP RF LOCK DETECT CHARGE PUMP 14(15)-BIT RF R COUNTER 14(15)-BIT IF R COUNTER BUFFER 22-BIT DATA REGISTER SDOUT N = BP + A 11(13)-BIT RF B COUNTER 6(5)-BIT RF A COUNTER RF PRESCALER PHASE COMPARATOR PHASE COMPARATOR ADF4217L/ ADF4218L/ ADF4219L VP2 VP1 VDD2 VDD1 ADF4219L ONLY NC IFINA IFINB ADF4217L ADF4218L ONLY REFIN CLOCK DATA LE RFINA RFINB DGNDRF AGNDRF DGNDIF AGNDIF CPRF MUXOUT CPIF FEATURES IN ( ) REFER TO ADF4219L NC = NO CONNECT FEATURES Total IDD: 7.1 mA Bandwidth/RF 3.0 GHz ADF4217L/ADF4218L, IF 1.1 GHz ADF4219L, IF 1.0 GHz 2.6 V to 3.3 V Power Supply 1.8 V Logic Compatibility Separate VP Allows Extended Tuning Voltage Selectable Dual Modulus Prescaler Selectable Charge Pump Currents Charge Pump Current Matching of 1% 3-Wire Serial Interface Power-Down Mode APPLICATIONS Wireless Handsets (GSM, PCS, DCS, CDMA, WCDMA) Base Stations for Wireless Radio (GSM, PCS, DCS, WCDMA) Wireless LANs Communications Test Equipment Cable TV Tuners (CATV) GENERAL DESCRIPTION The ADF4217L/ADF4218L/ADF4219L are low power dual frequency synthesizers that can be used to implement local oscillators in the up-conversion and down-conversion sections of wireless receivers and transmitters. They can provide the LO for both the RF and IF sections. They consist of a low noise digital PFD (phase frequency detector), a precision charge pump, a programmable reference divider, programmable A and B counters, and a dual modulus prescaler (P/P + 1). The A and B counters, in conjunction with the dual modulus prescaler (P/P + 1), implement an N divider (N = BP + A). In addition, the 14-bit reference counter (R Counter) allows selectable REFIN fre- quencies at the PFD input. A complete PLL (phase-locked loop) can be implemented if the synthesizers are used with an external loop filter and VCOs (voltage controlled oscillators). Control of all the on-chip registers is via a simple 3-wire interface with 1.8 V compatibility. The devices operate with a power supply ranging from 2.6 V to 3.3 V and can be powered down when not in use. |
유사한 부품 번호 - ADF4217L |
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유사한 설명 - ADF4217L |
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