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74ALVCH16843DGG 데이터시트(PDF) 8 Page - NXP Semiconductors |
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74ALVCH16843DGG 데이터시트(HTML) 8 Page - NXP Semiconductors |
8 / 12 page Philips Semiconductors Product specification 74ALVCH16843 18-bit bus interface D-type latch (3-State) 1998 Aug 04 8 AC WAVEFORMS FOR VCC = 2.3V TO 2.7V AND VCC < 2.3V RANGE VM = 0.5 V VX = VOL + 0.15V VY = VOH –0.15V VOL and VOH are the typical output voltage drop that occur with the output load. V I = VCC AC WAVEFORMS FOR VCC = 3.0V TO 3.6V AND VCC = 2.7V RANGE VM = 1.5 V VX = VOL + 0.3V VY = VOH –0.3V VOL and VOH are the typical output voltage drop that occur with the output load. V I = 2.7V tPHL tPLH VOL CLR, Dn VI PRE GND VOH Qn OUTPUT VM VM SH00147 Waveform 1. Data input (Dn) to output (Qn), clear input (CLR) to output (Qn) and preset input (PRE) to output (Qn) propagation delay LE INPUT Qn OUTPUT VI GND VOH VOL tPHL tPLH tW VM VM VM SH00150 Waveform 2. Latch enable input (LE) pulse width, the latch enable input to output (Qn) propagation delay Dn INPUT LE INPUT tSU th NOTE: The shaded areas indicate when the input is permitted to change for predictable output performance. tSU th VI GND VI GND VM VM SH00149 Waveform 3. Data set-up and hold times for the Dn input to the LE input CLR, PRE tW(L) tREM VI GND LE VM VM SH00148 VI GND Waveform 4. Clear (CLR) and preset (PRE) pulse width, the clear (CLR) and preset (PRE) to latch (LE) removal time tPLZ tPZL VI nOE INPUT GND VCC OUTPUT LOW-to-OFF OFF-to-LOW VOL VOH OUTPUT HIGH-to-OFF OFF-to-HIGH GND outputs enabled outputs enabled outputs disabled tPHZ VM VM VM tPZH VX VY SH00137 Waveform 5. 3-State enable and disable times |
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