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74AVC16834DGG 데이터시트(PDF) 4 Page - NXP Semiconductors |
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4 / 10 page Philips Semiconductors Preliminary specification 74AVC16834 18-bit registered driver with inverted register enable (3-State) 1999 Jul 23 4 168-pin SDR SDRAM DIMM The PLL clock distribution device and AVC registered drivers reduce signal loads on the memory controller and prevent timing delays and waveform distortions that would cause unreliable operation AVC16834 PCK2509S or PCK2510S AVC16834 BACK SIDE FRONT SIDE AVC16834 SW00407 RECOMMENDED OPERATING CONDITIONS SYMBOL PARAMETER CONDITIONS MIN MAX UNIT VCC DC supply voltage (according to JEDEC Low Voltage Standards) 1.65 2.3 3.0 1.95 2.7 3.6 V CC DC supply voltage (for low voltage applications) 1.2 3.6 VI DC Input voltage range 0 3.6 V DC output voltage range; output 3-State 0 3.6 VO DC output voltage range; output HIGH or LOW state 0 VCC V Tamb Operating free-air temperature range –40 +85 °C tr, tf Input rise and fall times VCC = 1.65 to 2.3 V VCC = 2.3 to 3.0 V VCC = 3.0 to 3.6 V 0 0 0 30 20 10 ns/V |
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