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75V16F64GS16 데이터시트(HTML) 5 Page - Integrated Silicon Solution, Inc

부품명 75V16F64GS16
상세내용  64 Mbit FLASH MEMORY AND 16 Mbit PSEUDO SRAM STACKED MULTI-CHIP PACKAGE (MCP)
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제조사  ISSI [Integrated Silicon Solution, Inc]
홈페이지  http://www.issi.com
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75V16F64GS16 데이터시트(HTML) 5 Page - Integrated Silicon Solution, Inc

 
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Integrated Silicon Solution, Inc. — www.issi.com — 1-800-379-4774
5
PRELIMINARY INFORMATION
Rev. 00A
08/01/02
75V16F64GS16
ISSI®
Full Standby
H
H
H
X
X
X
X
High-Z
High-Z
H
X
Output Disable(3)
H
L
X
H
H
X
X
High-Z
High-Z
H
X
L
H
X
H
H
X
X
High-Z
High-Z
H
X
Read from Flash(4)
LH
X
L
H
X
X
DOUT
DOUT
HX
Write to Flash
L
H
X
H
L
X
X
DIN
DIN
HX
Read from PSRAM(5)
HL
HL
H
X
X
DOUT
DOUT
HX
Write to PSRAM
L
L
DIN
DIN
H
L
H
H
L
H
L
High-Z
DIN
HX
LH
DIN
High-Z
Temporary
Sector
X
X
X
X
X
X
X
X
X
VID
X
Group Unprotection(6)
Flash Hardware
X
H
H
X
X
X
X
High-Z
High-Z
L
X
Reset
Boot Block
Sector Write
X
X
X
X
X
X
X
X
X
X
L
Protection
PSRAM Power Down(8) X
X
L
X
X
X
XX
XX
X
Legend : L = VIL, H = VIH, X = VIL or VIH. See “DC CHARACTERISTICS” for voltage levels.
Notes:
1. Other operations not indicated in this table are prohibited.
2. Do not apply
CEf = VIL, CE1r = VIL and CE2r = VIH all at once.
3. PSRAM Output Disable condition should not be kept longer than 1 ms.
4.
WE can be VIL if OE is VIL, OE at VIH initiates the write operations.
5. PSRAM Byte control at Read operation is not supported.
6. Also used for the extended sector group protections.
7. Protects “outermost” 2 ´ 8 Kbytes (4 words) on both ends of the boot block sectors.
8. Power Down mode can be entered from Standby state and all DQ pins are in High-Z state.
DEVICE BUS OPERATIONS
OPERATION(1,2)
CE
CE
CE
CE
CEf CE1
CE1
CE1
CE1
CE1r CE2r OE
OE
OE
OE
OE
WE
WE
WE
WE
WE
LB
LB
LB
LB
LBs
UB
UB
UB
UB
UBsDQ
7-DQ0
DQ
15-DQ8
RESET
RESET
RESET
RESET
RESET WP
WP
WP
WP
WP/ACC(7)


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