전자부품 데이터시트 검색엔진
  Korean  ▼
ALLDATASHEET.CO.KR

X  

IS61LPS102418A-200B2 데이터시트(PDF) 1 Page - Integrated Silicon Solution, Inc

부품명 IS61LPS102418A-200B2
상세설명  256K x 72, 512K x 36, 1024K x 18 18Mb SYNCHRONOUS PIPELINED, SINGLE CYCLE DESELECT STATIC RAM
Download  34 Pages
Scroll/Zoom Zoom In 100%  Zoom Out
제조업체  ISSI [Integrated Silicon Solution, Inc]
홈페이지  http://www.issi.com
Logo ISSI - Integrated Silicon Solution, Inc

IS61LPS102418A-200B2 데이터시트(HTML) 1 Page - Integrated Silicon Solution, Inc

  IS61LPS102418A-200B2 Datasheet HTML 1Page - Integrated Silicon Solution, Inc IS61LPS102418A-200B2 Datasheet HTML 2Page - Integrated Silicon Solution, Inc IS61LPS102418A-200B2 Datasheet HTML 3Page - Integrated Silicon Solution, Inc IS61LPS102418A-200B2 Datasheet HTML 4Page - Integrated Silicon Solution, Inc IS61LPS102418A-200B2 Datasheet HTML 5Page - Integrated Silicon Solution, Inc IS61LPS102418A-200B2 Datasheet HTML 6Page - Integrated Silicon Solution, Inc IS61LPS102418A-200B2 Datasheet HTML 7Page - Integrated Silicon Solution, Inc IS61LPS102418A-200B2 Datasheet HTML 8Page - Integrated Silicon Solution, Inc IS61LPS102418A-200B2 Datasheet HTML 9Page - Integrated Silicon Solution, Inc Next Button
Zoom Inzoom in Zoom Outzoom out
 1 / 34 page
background image
Integrated Silicon Solution, Inc. — 1-800-379-4774
1
Rev. D
02/11/05
ISSI ®
Copyright © 2005 Integrated Silicon Solution, Inc. All rights reserved. ISSI reserves the right to make changes to this specification and its products at any time without notice. ISSI assumes no liability
arising out of the application or use of any information, products or services described herein. Customers are advised to obtain the latest version of this device specification before relying on any
published information and before placing orders for products.
IS61VPS25672A IS61LPS25672A
IS61VPS51236A IS61LPS51236A
IS61VPS102418A IS61LPS102418A
FEATURES
• Internal self-timed write cycle
• Individual Byte Write Control and Global Write
• Clock controlled, registered address, data and
control
• Burst sequence control using MODE input
• Three chip enable option for simple depth
expansion and address pipelining
• Common data inputs and data outputs
• Auto Power-down during deselect
• Single cycle deselect
• Snooze MODE for reduced-power standby
• JTAG Boundary Scan for PBGA package
• Power Supply
LPS: VDD 3.3V + 5%, VDDQ 3.3V/2.5V + 5%
VPS: VDD 2.5V + 5%, VDDQ 2.5V + 5%
• JEDEC 100-Pin TQFP, 119-ball PBGA, 165-ball
PBGA, and 209-ball (x72) packages
• Lead-free available
DESCRIPTION
The
ISSI IS61LPS/VPS51236A,IS61LPS/VPS102418A,
and IS61LPS/VPS25672A are high-speed, low-power syn-
chronous static RAMs designed to provide burstable, high-
performance memory for communication and networking
applications. The IS61LPS/VPS51236A is organized as
524,288 words by 36 bits, the IS61LPS/VPS102418A is
organized as 1,048,576 words by 18 bits, and the IS61LPS/
VPS25672A is organized as 262,144 words by 72 bits.
Fabricated with
ISSI's advanced CMOS technology, the
device integrates a 2-bit burst counter, high-speed SRAM
core, and high-drive capability outputs into a single mono-
lithic circuit. All synchronous inputs pass through regis-
ters controlled by a positive-edge-triggered single clock
input.
Write cycles are internally self-timed and are initiated by
the rising edge of the clock input. Write cycles can be one
to four bytes wide as controlled by the write control inputs.
Separate byte enables allow individual bytes to be written.
The byte write operation is performed by using the byte
write enable (
BWE) input combined with one or more
individual byte write signals (
BWx). In addition, Global
Write (
GW) is available for writing all bytes at one time,
regardless of the byte write controls.
Bursts can be initiated with either
ADSP (Address Status
Processor) or
ADSC (Address Status Cache Controller)
input pins. Subsequent burst addresses can be generated
internally and controlled by the
ADV (burst address
advance) input pin.
The mode pin is used to select the burst sequence order,
Linear burst is achieved when this pin is tied LOW.
Interleave burst is achieved when this pin is tied HIGH or
left floating.
256K x 72, 512K x 36, 1024K x 18
18Mb SYNCHRONOUS PIPELINED,
SINGLE CYCLE DESELECT STATIC RAM
FEBRUARY 2005
FAST ACCESS TIME
Symbol
Parameter
250
200
Units
tKQ
Clock Access Time
2.6
3.1
ns
tKC
Cycle Time
4
5
ns
Frequency
250
200
MHz


유사한 부품 번호 - IS61LPS102418A-200B2

제조업체부품명데이터시트상세설명
logo
Integrated Silicon Solu...
IS61LPS102418A-200B2 ISSI-IS61LPS102418A-200B2 Datasheet
375Kb / 35P
   256Kx72,512Kx36,1024Kx18 18Mb SYNCHRONOUS PIPELINED,SINGLE CYCLE DESELECT STATIC RAM
IS61LPS102418A-200B2I ISSI-IS61LPS102418A-200B2I Datasheet
375Kb / 35P
   256Kx72,512Kx36,1024Kx18 18Mb SYNCHRONOUS PIPELINED,SINGLE CYCLE DESELECT STATIC RAM
More results

유사한 설명 - IS61LPS102418A-200B2

제조업체부품명데이터시트상세설명
logo
Integrated Silicon Solu...
IS61VPD51236A ISSI-IS61VPD51236A Datasheet
207Kb / 29P
   512K x 36, 1024K x 18 18Mb SYNCHRONOUS PIPELINED, DOUBLE CYCLE DESELECT STATIC RAM
IS61LF25672A ISSI-IS61LF25672A Datasheet
276Kb / 35P
   256K x 72, 512K x 36, 1024K x 18 18Mb SYNCHRONOUS FLOW-THROUGH STATIC RAM
IS61VPS25636A ISSI-IS61VPS25636A Datasheet
209Kb / 32P
   256K x 36, 512K x 18 9 Mb SYNCHRONOUS PIPELINED, SINGLE CYCLE DESELECT STATIC RAM
IS61LPS51218A ISSI-IS61LPS51218A_12 Datasheet
803Kb / 35P
   256K x 36, 256K x 32, 512K x 18 9 Mb SYNCHRONOUS PIPELINED, SINGLE CYCLE DESELECT STATIC RAM
IS61VPD25636A ISSI-IS61VPD25636A Datasheet
208Kb / 32P
   256K x 36, 512K x 18 9 Mb SYNCHRONOUS PIPELINED, DOUBLE CYCLE DESELECT STATIC RAM
IS61SPD25632T ISSI-IS61SPD25632T Datasheet
154Kb / 22P
   256K x 32, 256K x 36, 512K x 18 SYNCHRONOUS PIPELINE, DOUBLE-CYCLE DESELECT STATIC RAM
IS61NSCS25672 ISSI-IS61NSCS25672 Datasheet
182Kb / 32P
   RAM 256K x 72, 512K x 36 18Mb Synchronous SRAM
IS61LPS12832A ISSI-IS61LPS12832A Datasheet
168Kb / 26P
   128K x 32, 128K x 36, 256K x 18 4 Mb SYNCHRONOUS PIPELINED, SINGLE CYCLE DESELECT STATIC RAM
IS61VPS102436A ISSI-IS61VPS102436A Datasheet
281Kb / 21P
   1Mb x 36, 2Mb x 18 36Mb SYNCHRONOUS PIPELINED, SINGLE CYCLE DESELECT STATIC RAM
IS61VPS25672A ISSI-IS61VPS25672A_13 Datasheet
375Kb / 35P
   256Kx72,512Kx36,1024Kx18 18Mb SYNCHRONOUS PIPELINED,SINGLE CYCLE DESELECT STATIC RAM
More results


Html Pages

1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 32 33 34


데이터시트 다운로드

Go To PDF Page


링크 URL




개인정보취급방침
ALLDATASHEET.CO.KR
ALLDATASHEET 가 귀하에 도움이 되셨나요?  [ DONATE ] 

Alldatasheet는?   |   광고문의   |   운영자에게 연락하기   |   개인정보취급방침   |   링크교환   |   제조사별 검색
All Rights Reserved©Alldatasheet.com


Mirror Sites
English : Alldatasheet.com  |   English : Alldatasheet.net  |   Chinese : Alldatasheetcn.com  |   German : Alldatasheetde.com  |   Japanese : Alldatasheet.jp
Russian : Alldatasheetru.com  |   Korean : Alldatasheet.co.kr  |   Spanish : Alldatasheet.es  |   French : Alldatasheet.fr  |   Italian : Alldatasheetit.com
Portuguese : Alldatasheetpt.com  |   Polish : Alldatasheet.pl  |   Vietnamese : Alldatasheet.vn
Indian : Alldatasheet.in  |   Mexican : Alldatasheet.com.mx  |   British : Alldatasheet.co.uk  |   New Zealand : Alldatasheet.co.nz
Family Site : ic2ic.com  |   icmetro.com