전자부품 데이터시트 검색엔진 |
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SLD-2000 데이터시트(PDF) 1 Page - SIRENZA MICRODEVICES |
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SLD-2000 데이터시트(HTML) 1 Page - SIRENZA MICRODEVICES |
1 / 5 page The information provided herein is believed to be reliable at press time. Sirenza Microdevices assumes no responsibility for inaccuracies or omissions. Sirenza Microdevices assumes no responsibility for the use of this information, and all such information shall be entirely at the user’s own risk. Prices and specifications are subject to change without notice. No patent rights or licenses to any of the circuits described herein are implied or granted to any thrid party. Sirenza Microdevices does not authorize or warrant any Sirenza Microdevices product for use in life-support devices and/or systems. Copyright 2005 Sirenza Microdevices, Inc. All worldwide rights reserved. 303 S. Technology Court, Phone: (800) SMI-MMIC http://www.sirenza.com Broomfield, CO 80021 1 EDS-104292 Rev C Sirenza Microdevices’ SLD2000 is a robust 12 Watt, high performance LDMOS transistor die, designed for operation from 10 to 2700MHz. It is an excellent solution for applications requiring high linearity and effi- ciency. The SLD2000 is typically used as a driver or output stage for power amplifier, or transmitter applications. These robust power tran- sistors are fabricated using Sirenza’s high performance XEMOS IITM process. RF Specifications Symbol Parameter Unit Min Typ Max Frequency Frequency of Operation MHz 10 - 2700 Gain 10 Watt CW, 902 - 928MHz dB - 19 - Efficiency Drain Efficiency at 10 Watt CW, 915MHz % - 47 - Linearity 3rd Order IMD at 10 Watt PEP (Two Tone), 915MHz dBc - -32 - Linearity 1dB Compression (P1dB)W - 12 - RTH Thermal Resistance (Junction-to-Case, mounted in package) ºC/W - 4 - Functional Schematic Diagram SLD-2000 12 Watt Discrete LDMOS FET -Bare Die Product Features Applications • 12 Watt Output P 1dB • Single Polarity Operation • 19dB Gain at 900 MHz • XeMOS IITM LDMOS • Integrated ESD Protection, Class 1B • Aluminum Topside Metallization • Gold Backside Metallization • Base Station PA Driver • Repeaters • Military Communications • RFID • GSM, CDMA, Edge, WDCDMA Product Description Drain Manifold Gate Manifold Source - Backside Contact ESD Protection Test Conditions: Mounted in ceramic package and tested in Sirenza Evaluation Board VDS = 28.0V, IDQ = 150mA, TMounting Surface = 25ºC T DC Specifications Symbol Parameter Unit Min Typical Max gm Forward Transconductance @ 125mA IDQ, VDS=28V mA / V 590 VGS Threshold IDS=3mA V 3.0 3.8 5.0 VDS Breakdown 1mA VDS current V 65 70 Ciss Input Capacitance (Gate to Source) VGS=0V, VDS=28V pF 27.5 Crss Reverse Capacitance (Gate to Drain) VGS=0V, VDS=28V pF 0.8 Coss Output Capacitance (Drain to Source) VGS=0V, VDS=28V pF 14.7 RDSON Drain to Source Resistance, VGS=10V VDS=250mV R 0.6 0.75 |
유사한 부품 번호 - SLD-2000 |
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유사한 설명 - SLD-2000 |
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